Full adder can be designed using CMOS logic, transmission gates, dynamic logic or pass transistor logic. This paper presents Pass Transistor Logic based one bit full adders. The PTL based adder designs considered were SERF adder, 9A adder, 13A adder, CLRCL adder and 8T adder. Conventional 28T CMOS adder was also analysed. All the designs were simulated using Tanner EDA tool. Simulations were done at 180nm, 130nm and 90nm technologies. Transient analyses were done at frequencies ranging from 100MHz to 500MHz. The load capacitance was varied between 50fF to 250fF. Performance analyses were done with respect to power, delay and energy consumption obtained at 180nm, 130nm and 90nm technologies. At 180nm and 90nm, the 8T adder has lower power delay product (PDP). At 130nm 13A adder has got lower PDP when compared to all other adder designs. The 2bit, 4-bit and 8-bit ripple carry adders were designed at 180nm technology to analyse the performance in real time applications. 8T and 13A ripple carry adders were found to be the best with respect to delay and energy consumption respectively.
In electronic industry the level of integration is an important aspect as makes the electronic device simpler and more reliable. The device density increases with the better level of integration. Power dissipation, area occupied and delay are some of the important factors that need to be considered. These parameters play a vital role in manufacturing portable electronic gadgets. Designing of full adder using conventional CMOS design and PTL has been shown in this paper. A comparison is made between the two designs with respect to power dissipation, delay and area (number of transistors). Mentor Graphics Tool is used in design and simulation of the full adder. The PTL full adder has a smaller number of transistors and lower power dissipation compared to CMOS full adder. With all the comparison made it will be concluded that the PTL full adder performance is better than the CMOS full adder.
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