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Semiconducting single-wall carbon nanotubes are ideal semiconductors for printed electronics due to their advantageous electrical and mechanical properties, intrinsic printability in solution, and desirable stability in air. However, fully printed, large-area, high-performance, and flexible carbon nanotube active-matrix backplanes are still difficult to realize for future displays and sensing applications. Here, we report fully screen-printed active-matrix electrochromic displays employing carbon nanotube thin-film transistors. Our fully printed backplane shows high electrical performance with mobility of 3.92 ± 1.08 cm V s, on-off current ratio I/I ∼ 10, and good uniformity. The printed backplane was then monolithically integrated with an array of printed electrochromic pixels, resulting in an entirely screen-printed active-matrix electrochromic display (AMECD) with good switching characteristics, facile manufacturing, and long-term stability. Overall, our fully screen-printed AMECD is promising for the mass production of large-area and low-cost flexible displays for applications such as disposable tags, medical electronics, and smart home appliances.

Sodium-ion batteries offer an attractive option for potential low cost and large scale energy storage due to the earth abundance of sodium. Red phosphorus is considered as a high capacity anode for sodium-ion batteries with a theoretical capacity of 2596 mAh/g. However, similar to silicon in lithium-ion batteries, several limitations, such as large volume expansion upon sodiation/desodiation and low electronic conductance, have severely limited the performance of red phosphorus anodes. In order to address the above challenges, we have developed a method to deposit red phosphorus nanodots densely and uniformly onto reduced graphene oxide sheets (P@RGO) to minimize the sodium ion diffusion length and the sodiation/desodiation stresses, and the RGO network also serves as electron pathway and creates free space to accommodate the volume variation of phosphorus particles. The resulted P@RGO flexible anode achieved 1165.4, 510.6, and 135.3 mAh/g specific charge capacity at 159.4, 31878.9, and 47818.3 mA/g charge/discharge current density in rate capability test, and a 914 mAh/g capacity after 300 deep cycles in cycling stability test at 1593.9 mA/g current density, which marks a significant performance improvement for red phosphorus anodes for sodium-ion chemistry and flexible power sources for wearable electronics.

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Nonvolatile, flexible artificial synapses that can be used for brain-inspired computing are highly desirable for emerging applications such as human–machine interfaces, soft robotics, medical implants, and biological studies. Printed devices based on organic materials are very promising for these applications due to their sensitivity to ion injection, intrinsic printability, biocompatibility, and great potential for flexible/stretchable electronics. Herein, we report the experimental realization of a nonvolatile artificial synapse using organic polymers in a scalable fabrication process. The three-terminal electrochemical neuromorphic device successfully emulates the key features of biological synapses: long-term potentiation/depression, spike timing-dependent plasticity learning rule, paired-pulse facilitation, and ultralow energy consumption. The artificial synapse network exhibits an excellent endurance against bending tests and enables a direct emulation of logic gates, which shows the feasibility of using them in futuristic hierarchical neural networks. Based on our demonstration of 100 distinct, nonvolatile conductance states, we achieved a high accuracy in pattern recognition and face classification neural network simulations.

Although digital systems fabricated from carbon-nanotube-based field-effect transistors (CNFETs) promise significant energy efficiency benefits, realizing these benefits requires a complementary CNFET technology, i.e., CNFET CMOS, comprising both PMOS and NMOS CNFETs. Furthermore, this CNFET CMOS process must be robust (e.g., airstable), tunable (e.g., ability to control CNFET threshold voltages), and silicon CMOS compatible (to integrate within existing manufacturing facilities and process flows). Despite many efforts, such a silicon CMOS compatible CNT doping strategy for forming NMOS CNFETs does not exist. Techniques today are either not air-stable (using reactive low work function metals), not solid-state or silicon CMOS compatible (employing soluble molecular dopants in ionic solutions), or have not demonstrated precise control over the amount of doping (for setting threshold voltage, V T ). Here, we demonstrate an electrostatic doping technique that meets all of these requirements. The key to our technique is leveraging atomic layer deposition (ALD) to encapsulate CNTs with nonstoichiometric oxides. We show that ALD allows for precise control of oxide stoichiometry, which translates to direct control of the amount of CNT doping. We experimentally demonstrate the ability to modulate the strength of the p-type conduction branch by >2500× (measured as the change in current at fixed bias), realize NMOS CNFETs with n-type conduction ∼500× stronger than p-type conduction (also measured by the relative current at fixed biases), and tune V T over a ∼1.5 V range. Moreover, our technique is compatible with other doping schemes; as an illustration, we combine electrostatic doping and low work function contact engineering to achieve CNFET CMOS with symmetric NMOS and PMOS (i.e., CNFET ON-current for NMOS and PMOS is within 6% of each other). Thus, this work realizes a solid-state, air-table, very large scale integration and silicon CMOS compatible doping strategy, enabling integration of CNFET CMOS within standard fabrication processes today.

Semiconducting single-wall carbon nanotubes are ideal semiconductors for printed thin-film transistors due to their excellent electrical performance and intrinsic printability with solution-based deposition. However, limited by resolution and registration accuracy of current printing techniques, previously reported fully printed nanotube transistors had rather long channel lengths (>20 μm) and consequently low current-drive capabilities (<0.2 μA/μm). Here we report fully inkjet printed nanotube transistors with dramatically enhanced on-state current density of ∼4.5 μA/μm by downscaling the devices to a sub-micron channel length with top-contact self-aligned printing and employing high-capacitance ion gel as the gate dielectric. Also, the printed transistors exhibited a high on/off ratio of ∼10, low-voltage operation, and good mobility of ∼15.03 cm Vs. These advantageous features of our printed transistors are very promising for future high-definition printed displays and sensing systems, low-power consumer electronics, and large-scale integration of printed electronics.

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