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Graphene grown on a copper (Cu) substrate by chemical vapor deposition (CVD) is typically required to be transferred to another substrate for the fabrication of various electrical devices. PMMA-mediated wet process is the most widely used method for CVD-graphene-transfer. However, PMMA residue and wrinkles that inevitably remain on the graphene surface during the transfer process are critical issues degrading the electrical properties of graphene. In this paper, we report on a PMMA-mediated graphene-transfer method that can effectively reduce the density and size of the PMMA residue and the height of wrinkles on the transferred graphene layer. We found out that acetic acid is the most effective PMMA stripper among the typically used solutions to remove the PMMA residue. In addition, we observed that an optimized annealing process can reduce the height of the wrinkles on the transferred graphene layer without degrading the graphene quality. The effects of the suggested wet transfer process were also investigated by evaluating the electrical properties of field-effect transistors fabricated on the transferred graphene layer. The results of this work will contribute to the development of fabrication processes for high-quality graphene devices, given that the transfer of graphene from the Cu substrate is essential process to the application of CVD-graphene.

Touch-screen technologies, which are at the forefront of a design revolution in user interfaces, are coming into the spotlight. Lately, capacitive-type touchscreens have been widely adopted in high-end mobile applications mainly because they offer multi-and soft-touch features together with higher durability and superior light transmittance over resistive-type touch-screens. Meanwhile, manufacturing costs have slowed down the adoption of this technology in lowend applications. Many display-module makers are trying to reduce system cost by merging the touch-screen panel (TSP) with the display panel [1]. At the same time, there is a desire for small-form-factor modules, which is driving an effort to reduce the number of components [2]. Hence in this paper we integrate 2 separate functions: a touch screen controller (TSC) and display driver IC (DDI), into a single chip. Figure 6.1.1 shows a comparison between a conventional touch-display system and an integrated one. The latter provides several advantages over the conventional one [3], which is composed of 3 parts: a layer of window glass, an overlay touch panel, and a display panel. Two or more ICs -TSC and DDI -are mounted on the flexible PCB and the bottom glass of the display panel. However, our integrated touch-display module is composed of only 2 parts: a layer of window glass and an integrated panel called an on-cell touch screen on which a touch grid is directly patterned by transparent electrodes such as indium tin oxide (ITO). The integrated system lowers the material and module-assembly costs while it reduces the manufacturing turn-around time and enables slimmer module design with better display quality.Although the integrated touch-display system has these advantages, there are a few technical hurdles to overcome. Figure 6.1.2 shows the pattern of sensing lines illustrated with various nearby capacitances, and vertical cross-sections of touch-display modules for the conventional module and the integrated one. The touch-sensing circuit measures the capacitances of the sensing line that are composed of the overlapped capacitance between the sensing line and the finger, known as a signal component, and horizontal-and vertical-parasitic capacitances, which are base components. In an on-cell TSP, the vertical parasitic capacitance between the sensing line and the display common electrode, which is a cathode in this case, is much larger than that of a conventional overlay-type since a gap between the 2 electrodes is smaller. This larger base component results in a reduced dynamic range allocated to the signal component. A reduced signal dynamic range means a reduced sensitivity in the sensor. Moreover, a larger parasitic capacitance between the sensing line and the cathode incurs more capacitive coupling of display noise to the sensing circuit. Another technical challenge is on integrating two chips into one. Large switching signals in the DDI block may interfere with the sensitive sensing circuit in the TSC block.To overcome the technical challenge due to la...

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