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A large lattice mismatch occurs when lightly boron doped (E15 cm-') epitaxial silicon la ers are deposited misfit stress causes wafer bow and the formation of misfit dislocations at the interface. The structure of misfit dislocation and effect of misfit stress on p/p+ wafer processing are discussed. A method for elimination of the misfit stress in p/p+ silicon wafers via lattice compeasation is presented. on a heavily boron doped (E10 cm-Y ) substrate. The

A process of selective epitaxial growth of silicon on an oxide-patterned substrate is developed, and the quality of the deposited silicon film is characterized. Good selectivity is achieved in depositing silicon only in the area where the silicon substrate is exposed and not in the areas covered with the oxide. The quality of the deposited silicon film is investigated by SEM and TEM. No dislocations are observed in the samples investigated by TEM. The j unction leakage of diodes fabricated on these samples is measured. At a reverse bias of 5V, a leakage current density of 30 nA/cm 2 is obtained. Precleaning at 1025~ for 3 rain in H2 for the patterned Si substrate was found to be adequate to produce good quality Si films. The size of the facet was found to be reduced by lowering the flow rate of the HC1 during the deposition.

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Silicon doubledrift IMPATT diodes with both drift regions implanted into A (undoped) epi on p+ substrates are discussed. By incorporating doublycharged ions, frequency coverage has been extended down to 40 GHz.The A epitaxial material was characterized by spreading resistance measurements so that the ions were implanted into a completely defined host material lattice. RF test results a t 55 GHz comparing single-and doubledrift diodes are given. Noise figure measurements show that the transition from small-to large-signal behavior begins at a power output -3 dB greater with doubledrift diodes. At reasonable outputs this results in -10 dB noise improvement (1).