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To significantly impact climate change, the annual photovoltaic (PV) module production rate must dramatically increase from ~135 gigawatts (GW) in 2020 to ~3 terawatts (TW) around 2030. A key knowledge...

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In this letter, we report on significant changes caused after dark annealing to the kinetics of the carrier‐induced defect, present in p‐type multi‐crystalline silicon PERC cells. The characteristic shapes of the degradation and regeneration curves under light soaking at 75 °C are dramatically altered, depending on the temperature of an initial dark anneal on the non‐degraded cell. Dark annealing for a fixed time (2.5 h) at temperatures of 200 °C or below, is found to accelerate both the subsequent degradation and regeneration rate and the degradation severity, while at higher temperatures it appears that a possible second defect with a significantly longer degradation and regeneration rate is activated. Through a further increase of the dark annealing temperature, the magnitude of this slow degradation is suppressed. This data provides essential information into the role that thermal history plays in the behavior of the still unidentified defect or defects, which is crucial for future studies of the degradation and methods to mitigate it.

Following intensive research and development, Suntech Power has successfully commercialised its Pluto technology with 0.5 GW annual production capacity, delivering up to 10% performance advantage over conventional screen-printed cells. The next generation of Pluto involves the development of improved rear surface design based on the design features of passivated emitter and rear locally diffused cells. Cells with an average efficiency over 20% were fabricated on 155 cm 2 commercial-grade p-type wafers using mass-manufacturing processes and equipment, with the highest single-cell efficiency independently confirmed at 20.3%. This is believed to be a record efficiency for this wafer type. Further optimisation work on contact pattern and rear surface passivation suggests the potential for further efficiency increase approaching 23%.

In this work, we demonstrate a form of minority carrier degradation on ntype Cz silicon that affects both the bulk and surface related lifetimes. We identify three key behaviors of the degradation mechanism; 1) a firing dependence of degradation extent, 2) the appearance of bulk degradation when wafers are fired in the presence of a diffused emitter and 3) a firing related apparent surface degradation when wafers are fired in the absence of an emitter. We further report a defect capture cross-section ratio of σn/σp = 0.028 ± 0.003 for the defect in n-type. Utilizing our understanding of LeTID in p-type silicon, we demonstrate that the degradation behaviors in both n-type and p-type silicon are closely correlated. In light of numerous reports on the involvement of hydrogen the potential role of a hydrogen-induced degradation mechanism is discussed in both p-and n-type silicon, particularly in relation to the diffusion of hydrogen and influence of hydrogen-dopant interactions.