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An increased interest to stitching for High NA EUVL is observed; this is driven by expected higher demand of larger size chips for various applications. In the past a recommendation was published [1] to have 1-5 um band where no critical structures of a High NA layer would be allowed. In [2], we have introduced new insights on at-resolution stitching. In this publication, we present new experimental results obtained on NXE:3400B scanner. In the past we showed NXE feasibility results of vertical lines and contact holes stitching at relaxed resolution (40-48 nm pitch) in a single wafer location. In this study we evaluate stitching behavior through slit at more aggressive resolutions (P36 and P24 lines / spaces).We provide an overview of interactions in the stitching area such as aerial image interactions, absorber reflection, absorber to black border transition, black border vicinity impact and show corresponding experimental and simulations results. We formulate initial requirements for black border edge placement control and show performance of new masks. For stitching with low-n masks, we discuss using sub-resolution gratings to suppress the elevated mask reflectivity. We show rigorous simulations of stitched images, its sensitivity to overlay errors and propose mitigation mechanisms for OPC. Finally, an overview of stitching enablers will be described: from improved reticle black border position accuracy and absorber reflectivity control to mask resolution and OPC requirements.