Digital Signal Processing (DSP) devices are becoming increasingly important with the introduction of multiple signal processing techniques. Vedic Multiplier is one of the most common applications for high-speed DSP deployment. This paper constitutes a significant development in the design of the FIR filter architecture based on the modified Nikhalam Sutra Vedic multiplier. In addition, the Kongestone adder is used to increase speed performance. Using Xilinx FPGA Spartan 6 with Xilinx ISE, the modified architecture of FIR filter has been simulated and synthesized for achieving optimized results. The simulation results of the proposed FIR filter architecture illustrate that it operates at least 20 percent faster than traditional multiplier-based FIR filters
Over the past few decades, advances in IC technology have steadily shrunk feature sizes, necessitating the placement of more operational circuits on every chip. In designing digital circuits, a novel GDI based circuit is indeed the center of consideration, since it requires less power and achieves greater efficiency. GDI-based circuits mimic CMOS transistors but feature fewer transistors with a greater capacity for performance and reliability. This paper investigates the modelling and implementation of a Finite Impulse-Response (FIR) block developed utilizing GDI-based circuits as well as basic blocks. In this study, an eight-tap FIR architecture relying on GDI cells is created. The results reveal that even a FIR architecture with eight taps and GDI delivers reduced power consumption and performance improvement.
An unanticipated outburst of pneumonia of inexperienced in Wuhan, , China stated in December 2019. World health organization has recognized pathogen and termed it COVID-19. COVID-19 turned out to be a severe urgency in the entire world. The influence of this viral syndrome is now an intensifying concern. Covid-19 has changed our mutual calculus of ambiguity. It is more world-wide in possibility, more deeply , and much more difficult than any catastrophe that countries and organizations have ever faced. The next normal requires challenging ambiguity head-on and building it into decision-making. It is examined that every entity involved in running supply chains would require through major as employee, product, facility protocols, and transport would have to be in place. It is an urgent need of structuring to apply the lessons well-read for our supply chain setup. With higher managers now being aware of the intrinsic hazards in their supply chain, key and suggestions-recommendations will help to guide leader to commit to a newly planned, more consistent supply chain setup. Besides, the employees’ mental health is also a great concern.
The exponential growth of the internet and contemporary communications users have established safety as a fundamental design feature for encrypted transmission. The Enhanced Cryptography Standard is perhaps the most widely used cryptography information security algorithm standard that has been authorized by NIST. This paper proposes a high-throughput design for the AES Algorithm with huge key sizes. AES would be a block cipher that ensures data security by using key lengths of 128,192 and 256-bits. The design concept focuses on a 256-bit key size classification algorithm since a big key size is required to ensure excellent security. Additionally, simultaneous key expansion & encryption/decryption processes would be pipelined to maximize speed. Parallelization of a key expansion module's sub-processes would be used to reduce the critical chain latency. The S-box comprising sub-byte & inverse sub-byte operations has been developed with compound field arithmetic operations to reduce time and area further. The work Increased throughput by 50%, area reduced by 34.32 %, and latency by 20% compared to the old approach with modified nikhilam sutra. Additionally, integrated AES encryption/decryption is planned and implemented on the FPGA Zed board utilizing Verilog HDL in Xilinx Vivado.
A brief overview of recent trends in Surface Plasmon Resonance (SPR) technology especially for gas sensing is presented. Some novel sensors (metallic grating, MIM, optical fiber) are discussed along with the development of plasmonic nanostructure based on zinc oxide (ZnO) for enhancing sensing application.
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