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Abstract-Dynamic element matching (DEM) is capable of providing good average linearity performance in matching critical circuits in the presence of major component mismatch, but the approach has received minimal industrial adoption outside of Σ−∆ structures because of challenges associated with implementation of a required randomizer and because of the time-local nonstationarity. This paper presents a DEM approach to analog-to-digital converter (ADC) testing in which low-precision DEM digitalto-analog converters (DACs) are used to generate stimulus signals for ADCs under test. It is shown that in a testing environment, this approach provides very high precision test results, and timelocal nonstationarity is of no concern. In addition to traditional random DEM techniques, a deterministic DEM (DDEM) strategy that eliminates the need for a randomizer is introduced. The performance of the DDEM method is established mathematically and validated with detailed simulation results. Furthermore, the DDEM method requires far fewer samples to achieve the same level of average linearity than the random DEM approach. It is demonstrated that both the random DEM and DDEM methods can be used to accurately test ADCs with linearity that far exceeds that of the DAC used as a signal generator. This technique of using imprecise excitations and DEM to test much more accurate ADCs offers potential for use in both production test and built-in self-test environments where high linearity test sources are difficult to implement.Index Terms-Analog-to-digital converter (ADC) testing, built-in self-test (BIST), dynamic element matching (DEM), integral nonlinearity (INL) testing.

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Dynamic element matching (DEM) is an effective approach to achieving good average performance in the presence of major mismatch in matching-critical circuits. This paper presents a deterministic DEM (DDEM) strategy for ADC testing that offers substantial reductions in testing cost.The approach is mathematically formulated and validated with simulation results that show the number of test vectors needed is comparable to what are currently used with standard code density linearity testing. It is demonstrated that the DDEM method can be used to accurately test ADCs with linearity that far exceeds that of the DAC used as a signal generator. This technique offers potential for use in both production test and BIST environments where high linearity devices are difficult to test and characterize.

Deterministic dynamic element matching (DDEM) is applied to low accuracy DACs for high resolution ADC test. The testing accuracy is impressive while the test cost is relatively low. This work tries to further optimize the DDEM parameters based on improving the testing accuracy and reducing the test hardware and computation cost. The optimization is accomplished by theoretical analysis and numerical simulation. Some typical parameter values are suggested by this work.

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A deterministic dynamic element matching (DEM) approach to ADC testing 1s introduced and compared with a common random DEM method. With both approaches, a highly non-ideal DAC is used to generate an excitation for a DUT that has linearity that far exceeds that of the test stimulus. Simulation results show that both methods can be used for testing of ADCs but with a substantial reduction in the number of samples required for the deterministic DEM method. This technique of using an imprecise excitation to test an accurate ADC offers potential for use in both production test and BIST environments.