Over the past 30 years electronic applications have been dominated by complementary metal oxide semiconductor (CMOS) devices. These combine p- and n-type field effect transistors (FETs) to reduce static power consumption. However, CMOS transistors are limited to static electrical functions, i.e., electrical characteristics that cannot be changed. Here we present the concept and a demonstrator of a universal transistor that can be reversely configured as p-FET or n-FET simply by the application of an electric signal. This concept is enabled by employing an axial nanowire heterostructure (metal/intrinsic-silicon/metal) with independent gating of the Schottky junctions. In contrast to conventional FETs, charge carrier polarity and concentration are determined by selective and sensitive control of charge carrier injections at each Schottky junction, explicitly avoiding the use of dopants as shown by measurements and calculations. Besides the additional functionality, the fabricated nanoscale devices exhibit enhanced electrical characteristics, e.g., record on/off ratio of up to 1 × 10(9) for Schottky transistors. This novel nanotransistor technology makes way for a simple and compact hardware platform that can be flexibly reconfigured during operation to perform different logic computations yielding unprecedented circuit design flexibility.

We present novel multifunctional nanocircuits built from nanowire transistors that uniquely feature equal electron and hole conduction. Thereby, the mandatory requirement to yield energy efficient circuits with a single type of transistor is shown for the first time. Contrary to any transistor reported up to date, regardless of the technology and semiconductor materials employed, the dually active silicon nanowire channels shown here exhibit an ideal symmetry of current-voltage device characteristics for electron (n-type) and hole (p-type) conduction as evaluated in terms of comparable currents, turn-on threshold voltages, and switching slopes. The key enabler to symmetry is the selective tunability of the tunneling transmission of charge carriers as rendered by the combination of the nanometer-scale dimensions of the junctions and the application of radially compressive strain. To prove the advantage of this concept we integrated dually active transistors into cascadable and multifunctional one-dimensional circuit strings. The nanocircuits confirm energy efficient switching and can further be electrically configured to provide four different types of operation modes compared to a single one when employing conventional electronics with the same amount of transistors.

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Germanium is a promising material for future very large scale integration transistors, due to its superior hole mobility. However, germanium-based devices typically suffer from high reverse junction leakage due to the low band-gap energy of 0.66 eV and therefore are characterized by high static power dissipation. In this paper, we experimentally demonstrate a solution to suppress the off-state leakage in germanium nanowire Schottky barrier transistors. Thereto, a device layout with two independent gates is used to induce an additional energy barrier to the channel that blocks the undesired carrier type. In addition, the polarity of the same doping-free device can be dynamically switched between p- and n-type. The shown germanium nanowire approach is able to outperform previous polarity-controllable device concepts on other material systems in terms of threshold voltages and normalized on-currents. The dielectric and Schottky barrier interface properties of the device are analyzed in detail. Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.

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With CMOS scaling reaching physical limits in the next decade, new approaches are required to enhance the functionality of electronic systems. Reconfigurability on the device level promises to realize more complex systems with a lower device count. In the last five years a number of interesting concepts have been proposed to realize such a device level reconfiguration. Among these the reconfigurable field effect transistor (RFET), a device that can be configured between an n-channel and p-channel behavior by applying an electrical signal, can be considered as an end-of-roadmap extension of current technology with only small modifications and even simplifications to the process flow. This article gives a review on the RFET basics and current status. In the first sections state-of-the-art of reconfigurable devices will be summarized and the RFET will be introduced together with related devices based on silicon nanowire technology. The device optimization with respect to device symmetry and performance will be discussed next. The potential of the RFET device technology will then be shown by discussing selected circuit implementations making use of the unique advantages of this device concept. The basic device concept was also extended towards applications in flexible devices and sensors, also extending the capabilities towards so-called More-than-Moore applications where new functionalities are implemented in CMOS-based processes. Finally, the prospects of RFET device technology will be discussed.

Reconfigurable silicon nanowire field-effect transistors (RFETs) combine the functionality of classical unipolar p-type and n-type FETs in one universal device. In this paper, we show devices exhibiting full symmetry between p-and n-functionality, while having identical geometry. Scaling trends and feasibility for digital circuit integration are evaluated based on TCAD simulations. The method of logical effort is applied to analyze fundamental differences in circuit topology using this unique type of multigate transistors. We introduce a set of multifunctional logic gates based on RFETs providing all basic Boolean functions, including NAND/NOR, AND/OR, and XOR/XNOR, and compared them with classical implementations. Two 1-bit full adders based on those gates are presented as an insightful example that RFETs are one possible solution to increase the system functionality. Moreover, it is shown that an asymmetric transistor layout with individual optimization of both top gates can be used to increase the speed of those circuits.

Silicon nanowires offer unique properties like inherent small diameters, quasi‐one‐dimensional current transport and the flexibility to combine materials that cannot be combined in bulk or thin film structures. Based on these properties electron devices, sensors as well as solar cells and lithium batteries can be envisioned that significantly outperform their thin film or bulk counterparts. The possibility to form silicon nanowires in a top–down process using bulk silicon or silicon‐on‐insulator substrates, gives this technology the potential for a seamless integration into integrated electronic systems. This Review gives an overview of important device applications of silicon nanowires. Starting with nanowire fabrication, the different device concepts will be introduced and their most important features are reported. Illustration of silicon nanowire formation and application in a reconfigurable device. (© 2013 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)