Functionality-Enhanced Logic Gate Design Enabled by Symmetrical Reconfigurable Silicon Nanowire Transistors

Trommer, Jens; Heinzig, André; Baldauf, Tim; Slesazeck, Stefan; Mikolajick, Thomas; Weber, Walter M.

doi:10.1109/tnano.2015.2429893

Cited by 102 publications

(43 citation statements)

References 23 publications

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“…More details about the simulation setup and considered transport models can be found in Ref. [16], [21]. The data is compared to mixed-mode simulations of a CMOS reference design in 22 nm FD-SOI technology [23].…”

Section: Eliminating Charge Sharing At the Device Levelmentioning

confidence: 99%

Inherent Charge-Sharing-Free Dynamic Logic Gates Employing Transistors With Multiple Independent Inputs

Trommer

Simon

Slesazeck

et al. 2020

IEEE J. Electron Devices Soc.

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Charge sharing poses a fundamental problem in the design of dynamic logic gates, which is nearly as old as digital circuit design itself. Although, many solutions are known, up to now most of them add additional complexity to a given circuit and require careful optimization of device sizes. Here we propose a simple CMOS-technology compatible transistor level solution to the charge sharing problem, employing a new class of field effect transistors with multiple independent gates (MIGFETs). Based on mixed-mode simulations in a coordinated device-circuit co-design framework, we show that their underlying device physics provides an inherent suppression of the charge sharing effect. Circuit layouts and design examples are discussed, which elucidate the fundamental differences in circuit topology to classical CMOS designs. For example it is shown that dynamic gates from MIGFET scale much better with stack height of long serial networks, leading to an increased circuit performance, while also providing higher signal stability.

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Section: Eliminating Charge Sharing At the Device Levelmentioning

confidence: 99%

Inherent Charge-Sharing-Free Dynamic Logic Gates Employing Transistors With Multiple Independent Inputs

Trommer

Simon

Slesazeck

et al. 2020

IEEE J. Electron Devices Soc.

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“…Finally, employing gate electrodes instead of static doping even enables to change the doping dynamically, that is it allows using the same device as n ‐type and p ‐type transistors as well as operating it as a TFET. In turn, this does not only reduce the complexity of circuits but would also enable circuits that can be operated in a conventional CMOS mode when high‐performance is necessary and switch to TFET operation whenever the power consumption needs to be minimized. In the following sections we will discuss the different aspects of electrostatic doping and how this can be realized experimentally.…”

Section: Electrostatic Doping Of Field‐effect Transistorsmentioning

confidence: 99%

“…It has been mentioned above that it is an attractive approach to increase the functionality of highly integrated circuits by adding functionality to the devices themselves, that is with reconfigurable devices . Employing the BTG substrates allows not only for conventional n ‐/ p ‐type devices but also enables to configure the transistor as TFET.…”

Section: Electrostatic Doping Of Field‐effect Transistorsmentioning

confidence: 99%

Alternatives for Doping in Nanoscale Field‐Effect Transistors

Riederer

Grap

Fischer

et al. 2018

Physica Status Solidi (a)

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In the present article, alternatives to impurity doping in nanoscale field‐effect transistors (FETs) are investigated. The discussion is based on conventional and tunnel FETs. The impact of dopant deactivation due to dielectric mismatch or quantization, random dopant effects, and the degeneracy level on the performance is discussed. As alternatives metal‐semiconductor‐contacts, gate‐controlled doping and an interface engineering approach are studied. One of the main requirements for proper device functionality is the existence of a band gap in the contacts. Thus, metal‐semiconductor contacts are less suited since they lead to ambipolar operation with increased leakage and to a deteriorated on‐state performance. With gate‐controlled doping, electrodes areused to create doped regions leaving behind a pristine band gap. Moreover, it enables reconfigurable devices with nFET, pFET and tunnel FET operation. Furthermore, with multiple nanoscale gates, electrostatic doping allows manipulating the potential within the device on the nanoscale. Experimental demonstrations of such devices with triple‐gates and multiple gate structures are presented. Finally, the interface engineering approach allows combining a metallic contact electrode with an almost unmodified band gap in the source/drain contacts by adjusting an ultrathin insulator in‐between metal and semiconductor yielding quasi‐doped contacts whose polarity depends on the work function of contact metal.

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“…An attractive approach to increase the functionality of highly integrated circuits is to add functionality to the devices themselves. Reconfigurable transistors have therefore attracted a great deal of attention . Field effect transistors (FETs) with reconfigurable contacts consist of at least two gate electrodes, namely one that is the actual gate and the other gate electrode ‐ the program or polarity gate ‐ that allows to reconfigure the transistor.…”

Section: Transistors Based On Multigate Structuresmentioning

confidence: 99%

“…Field effect transistors (FETs) with reconfigurable contacts consist of at least two gate electrodes, namely one that is the actual gate and the other gate electrode ‐ the program or polarity gate ‐ that allows to reconfigure the transistor. Based on such lateral dual‐gate architectures, devices that can be operated as n ‐type and p ‐type transistors have been demonstrated . However, adding a third gate electrode allows not only for conventional n ‐/ p ‐type devices but also enables to configure the transistor as band‐to‐band tunneling field‐effect transistor (TFET) (see section 3.4).…”

Section: Transistors Based On Multigate Structuresmentioning

confidence: 99%

Investigations on Field‐Effect Transistors Based on Two‐Dimensional Materials

et al. 2017

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In the present article, experimental and theoretical investigations regarding field-effect transistors based on two-dimensional (2D) materials are presented. First, the properties of contacts between a metal and 2D material are discussed. To this end, metal-to-graphene contacts as well to transition metal dichalcogenides (TMD) are studied. Whereas metal-graphene contacts can be tuned with an appropriate back-gate, metal-TMD contacts exhibit strong Fermi level pinning showing substantially limited maximum possible drive current. Next, tungsten diselenide (WSe 2 ) field-effect transistors are presented. Employing buried-triple-gate substrates allows tuning source, channel and drain by applying appropriate gate voltages so that the device can be reconfigured to work as n-type, p-type and as so-called band-to-band tunnel field-effect transistor on the same WSe 2 flake.

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Functionality-Enhanced Logic Gate Design Enabled by Symmetrical Reconfigurable Silicon Nanowire Transistors

Cited by 102 publications

References 23 publications

Inherent Charge-Sharing-Free Dynamic Logic Gates Employing Transistors With Multiple Independent Inputs

Inherent Charge-Sharing-Free Dynamic Logic Gates Employing Transistors With Multiple Independent Inputs

Alternatives for Doping in Nanoscale Field‐Effect Transistors

Investigations on Field‐Effect Transistors Based on Two‐Dimensional Materials

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