Negative Capacitance Field-Effect Transistor (NCFET) pushes the sub-threshold swing beyond its fundamental limit of 60 mV/decade by incorporating a ferroelectric material within the gate stack of transistor. Such a material manifests itself as a negative capacitance (NC) that provides an internal voltage amplification for the transistor resulting in higher ON current levels. Hence, the performance of processors can be boosted while the operating voltage still remains the same. However, having a negative capacitance makes the total gate terminal capacitance larger. While, the impact of that on compensating the gained performance has already been studied in literature, this work is the first to explore the impact of negative capacitance on exacerbating the IR-drop problem in processors. In fact, voltage fluctuation in the Power Delivery Network (PDN) due to IR-drops is one of the prominent sources of performance loss in processors, which necessitates adding timing guardbands to sustain a reliable operation during runtime. In this work, we study NC-FinFET standard cells and processor for the 7 nm technology node. We demonstrate that NC, on the one hand, results in larger IR-drops due to the increase in current densities across the chip, which leads to a higher stress on the PDN. However, the internal voltage amplification provided by NC, on the other hand, compensates to some degree the voltage reduction caused by IR-drop. We investigate, from physics all the way to full-chip (GDSII) level, how the overall performance of a processor is affected under the impact that NC has on magnifying and compensating IR-drop.
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