Negative Capacitance Transistor to Address the Fundamental Limitations in Technology Scaling: Processor Performance

Amrouch, Hussam; Pahwa, Girish; Gaidhane, Amol D.; Henkel, Jörg; Chauhan, Yogesh Singh

doi:10.1109/access.2018.2870916

Cited by 76 publications

(44 citation statements)

References 47 publications

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“…It should be understood that I can provide only an overview on selected emerging technologies; there are further interesting technologies, like negative capacitance field-effect transistors (NCFETs) [94] or photonics [95,96]. Aside from 3D and 2.5D integration, note that all selected technologies are realized at the device level; therefore, these technologies can also be referred to as emerging devices.…”

Section: Fundamentals Of Selected Emerging Technologiesmentioning

confidence: 99%

Hardware Security For and Beyond CMOS Technology

Knechtel¹

2020

Proceedings of the 2020 International Symposium on Physical Design

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As with most aspects of electronic systems and integrated circuits, hardware security has traditionally evolved around the dominant CMOS technology. However, with the rise of various emerging technologies, whose main purpose is to overcome the fundamental limitations for scaling and power consumption of CMOS technology, unique opportunities arise also to advance the notion of hardware security. In this paper, I first provide an overview on hardware security in general. Next, I review selected emerging technologies, namely (i) spintronics, (ii) memristors, (iii) carbon nanotubes and related transistors, (iv) nanowires and related transistors, and (v) 3D and 2.5D integration. I then discuss their application to advance hardware security and also outline related challenges. CCS CONCEPTS• Security and privacy → Security in hardware; • Hardware → Emerging technologies.

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Section: Fundamentals Of Selected Emerging Technologiesmentioning

confidence: 99%

Hardware Security For and Beyond CMOS Technology

Knechtel¹

2020

Proceedings of the 2020 International Symposium on Physical Design

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“…1. (a) NC-FinFET transistor structure, NCFET for short, with ferroelectric layer integrated inside the transistor's gate stack [4]. (b) Equivalent capacitance series, where the internal voltage exhibits a greater voltage (V internal > V G ).…”

Section: Negative Capacitance Transistor (Ncfet)mentioning

confidence: 99%

“…In this work, we consider four different layer thicknesses of FE, namely 1nm, 2nm, 3nm, and 4nm, which we refer to as TFE1, TFE2, TFE3, and TFE4, respectively. The thickness is limited to 4nm because for higher thicknesses, a hysteresis-free operation in NCFET transistor, which is essential to build logic gates, cannot be ensured any more [4]. The switching power (P switching ) of any logic is governed by the switching activity (α), total capacitance (C), operating voltage (V DD ) and operating frequency (f ): P switching ∝ αCV 2 DD f .…”

Section: Impact Of Ncfet On Powermentioning

confidence: 99%

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Power Side-Channel Attacks in Negative Capacitance Transistor

et al. 2020

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Side-channel attacks have empowered bypassing of cryptographic components in circuits. Power side-channel (PSC) attacks have received particular traction, owing to their non-invasiveness and proven effectiveness. Aside from prior art focused on conventional technologies, this is the first work to investigate the emerging Negative Capacitance Transistor (NCFET) technology in the context of PSC attacks. We implement a CAD flow for PSC evaluation at design-time. It leverages industry-standard design tools, while also employing the widely-accepted correlation power analysis (CPA) attack. Using standard-cell libraries based on the 7nm FinFET technology for NCFET and its counterpart CMOS setup, our evaluation reveals that NCFET-based circuits are more resilient to the classical CPA attack, due to the considerable effect of negative capacitance on the switching power. We also demonstrate that the thicker the ferroelectric layer, the higher the resiliency of the NCFET-based circuit, which opens new doors for optimization and trade-offs.

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“…In the past decade, complementary metal-oxidesemiconductor (CMOS) transistors have experienced unprecedented development, shrinking device sizes, and advances in integrated device design and fabrication, bringing the CMOS technology into the nanometer era. However, continued miniaturization has also brought about various new constraints, such as high-power consumption caused by chip overheating [1]. To solve these problems, steep switching characteristics and lower operating voltage can be achieved by lowering the sub-threshold slope (SS).…”

Section: Introductionmentioning

confidence: 99%

Analog / Radio-Frequency Performance Analysis of Nanometer Negative Capacitance Fully Depleted Silicon-On-Insulator Transistors

Si¹,

Zhang²,

Yu³

et al. 2020

Informacije MIDEM

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The negative capacitance field-effect transistor can break the limitation of the Boltzmann tyranny. In this study, the analog and radio-frequency (RF) performance of a nanometer negative-capacitance fully depleted silicon-on-insulator (NC-FDSOI) transistor is investigated. The analog/RF parameters of the NC-FDSOI device are compared with the conventional FDSOI counterparts for transconductance, output conductance, gate capacitance, cutoff frequency, and maximum oscillation frequency. In addition, the effect of ferroelectric thickness on the analog/RF performance of NC-FDSOI device is analyzed and discussed. The results show that even when operated at low voltages, NC-FDSOI transistors enable analog/RF performance improvement in traditional FDSOI counterparts at low power in the case of a suitable ferroelectric thickness. Analogna in radio frekvenčna analiza učinkovitosti nanometrskega polno osiromašenega silicijevega tran-zistorja na izolatorju z negativno kapacitivnostjoIzvleček: Poljski tranzistor z negativno kapacitivnostjo lahko premaga oviro Boltzmannove tiranije. V članku je raziskan analogna in radio frekvenčna učinkovitost nanometrskega polno osiromašenega silicijevega tranzistorja na izolatorju z negativno kapacitivnostjo (NC-FDSOI). Analogni/RF parametri NC_FDSOI elementa, kot so: transkonduktanca, izhodna konduktanca, kapacitivnost vrat, frekvenca odklopa in največja frekvenca osciliranja, so primerjani s klasičnim FDSOI. Dodatno je analiziran vpliv feroelektrične debeline NC-FDSOI elementa. Rezultati kažejo boljšo učinkovitost NC-FDSOI tranzistorjev tudi pri nizki napajalni napetosti in ustrezni feroelektrični debelini. Ključne

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Negative Capacitance Transistor to Address the Fundamental Limitations in Technology Scaling: Processor Performance

Cited by 76 publications

References 47 publications

Hardware Security For and Beyond CMOS Technology

Hardware Security For and Beyond CMOS Technology

Power Side-Channel Attacks in Negative Capacitance Transistor

Analog / Radio-Frequency Performance Analysis of Nanometer Negative Capacitance Fully Depleted Silicon-On-Insulator Transistors

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