The authors thank the correspondents for their note. The c 2 0 =2 correction term, while valid, rarely plays an important role in the final result because normally c 2 0 =2 is much smaller than 0 2 rms . The worst case scenario (which does not normally happen) is constant impulse sensitivity function (ISF). In this case, 0rms = c0. Correction to "A 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC"Kong-Pang Pun, Shouri Chatterjee, and Peter KingetIn the above paper [1], a mistake in the schematic diagram of the 0.5-V operational transconductance amplifier (OTA) (Fig. 11) was discovered by Prof. Dr. Martin Schubert of FH Regensburg, University of Applied Sciences, Regensburg, Germany. The original OTA circuit diagram shows two series combinations of a 5-k resistor and a 20-pF capacitor connecting the outputs of the first stage to the inputs of the second stage, which is incorrect. The correct OTA schematic is shown in Fig. 1 below. The RC combinations are connected between the inputs and outputs of the second stage for Miller compensation with right-half-plane zero cancellation and the first and second stages are directly coupled. We apologize for this error.

Abstract-A companion analysis of clock jitter and phase noise of single-ended and differential ring oscillators is presented. The impulse sensitivity functions are used to derive expressions for the jitter and phase noise of ring oscillators. The effect of the number of stages, power dissipation, frequency of oscillation, and shortchannel effects on the jitter and phase noise of ring oscillators is analyzed. Jitter and phase noise due to substrate and supply noise is discussed, and the effect of symmetry on the upconversion of 1/f noise is demonstrated. Several new design insights are given for low jitter/phase-noise design. Good agreement between theory and measurements is observed.

Index Terms-Design methodology, noise measurement, oscillator noise, oscillator stability, phase jitter, phase-locked loops, phase noise, voltage-controlled oscillators.

No abstract

Abstract-A near-field direct antenna modulation (NFDAM) technique is introduced, where the radiated far-field signal is modulated by time-varying changes in the antenna near-field electromagnetic (EM) boundary conditions. This enables the transmitter to send data in a direction-dependent fashion producing a secure communication link. Near-field direct antenna modulation (NFDAM) can be performed by using either switches or varactors. Two fully-integrated proof-of-concept NFDAM transmitters operating at 60 GHz using switches and varactors are demonstrated in silicon proving the feasibility of this approach.

In open-loop operation, this finely-tunable bridge circuit [S1] can deeply null the background response arising from parasitic effects and impedance mismatch to yield excellent signal-tobackground ratios (SBR's) of order ~5−10dB, on resonance. Various components for highresolution 180-degree-phase bridging and background nulling are also illustrated in the circuit diagram. Here R B is the resistance of a nanofabricated bridge resistor on chip (as shown in the inset of Fig. 1) -in practice it is often more convenient to employ another metalized nanobeam whose DC resistance is very close to the DC resistance of the resonator device of interest. This As demonstrated in Fig. S2, typical open-loop measurements of the UHF NEMS responses employing the circuit in Fig. S1 can yield SBR's of ~10dB. This represents a significant improvement over the SBR's of ~0.1−0.5dB typically obtained with the previous scheme [S2,S3] .

Abstract-In this paper, we compare the performance of the newly introduced distributed active transformer (DAT) structure to that of conventional on-chip impedance-transformations methods. Their fundamental power-efficiency limitations in the design of high-power fully integrated amplifiers in standard silicon process technologies are analyzed. The DAT is demonstrated to be an efficient impedance-transformation and power-combining method, which combines several low-voltage push-pull amplifiers in series by magnetic coupling. To demonstrate the validity of the new concept, a 2.4-GHz 1.9-W 2-V fully integrated power-amplifier achieving a power-added efficiency of 41% with 50-input and output matching has been fabricated using 0.35-m CMOS transistors.

Abstract-In this paper, we present the receiver and the on-chip antenna sections of a fully integrated 77-GHz four-element phased-array transceiver with on-chip antennas in silicon. The receiver section of the chip includes the complete down-conversion path comprising low-noise amplifier (LNA), frequency synthesizer, phase rotators, combining amplifiers, and on-chip dipole antennas. The signal combining is performed using a novel distributed active combining amplifier at an IF of 26 GHz. In the LO path, the output of the 52-GHz VCO is routed to different elements and can be phase shifted locally by the phase rotators. A silicon lens on the backside is used to reduce the loss due to the surface-wave power of the silicon substrate. Our measurements show a single-element LNA gain of 23 dB and a noise figure of 6.0 dB. Each of the four receive paths has a gain of 37 dB and a noise figure of 8.0 dB. Each on-chip antenna has a gain of +2 dBi.