Concepts and methods in optimization of integrated LC VCOs

Ham, Donhee; Hajimiri, Ali

doi:10.1109/4.924852

Cited by 583 publications

(274 citation statements)

References 31 publications

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“…Secondly, if we assume that and have their ideal long-channel value of 2/3, as much as 60% of the phase noise is generated by the tank resistance, and only 40% by all switches together. Thus, contrary to what was previously believed (see, e.g., the otherwise excellent treatment in [9]), and as is the case in the SS-VCO as well, tank losses are the major contributors to phase noise in the DS-VCO, at least in the ideal design considered so far. As a matter of fact, values for or close to 2/3 do not have to be wildly optimistic, since no large overdrive is usually needed by the MOS pairs for completing current switching, which means that the transistors are actually behaving rather like "long-channel" devices (or, more appropriately, "low-electric-field" devices [10]), where the ideal MOS transistor equations apply.…”

Section: Phase Noise In the Ds-vcocontrasting

confidence: 40%

More on the $1/{\rm f}^{2}$ Phase Noise Performance of CMOS Differential-Pair LC-Tank Oscillators

Andreani

Fard

2006

IEEE J. Solid-State Circuits

131

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Abstract-This paper presents a rigorous phase noise analysis in the 1 f 2 region for the differential CMOS LC-tank oscillator with both nMOS and pMOS switch pairs. A compact, closed-form phase noise equation is obtained, accounting for the noise contributions from both tank losses and transistors currents, which allows a robust comparison between LC oscillators built with either one or two switch pairs.The fabricated oscillator prototype is tunable between 2.15 and 2.35 GHz, and shows a phase noise of 144 dBc/Hz at 3 MHz offset from the 2.3 GHz carrier for a 4 mA bias current. The phase noise figure-of-merit is practically constant across the tuning range, with a minimum of 191.5 dBc/Hz. A reference single-switch-pair oscillator has been implemented and tested as well, and the difference between the phase noise levels displayed by the two oscillators is very nearly the one expected from theory.

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Section: Phase Noise In the Ds-vcocontrasting

confidence: 40%

More on the $1/{\rm f}^{2}$ Phase Noise Performance of CMOS Differential-Pair LC-Tank Oscillators

Andreani

Fard

2006

IEEE J. Solid-State Circuits

131

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“…In the QVCO, the pMOSFETs and nMOSFETs in the signal path exhibit cyclostationary noise behavior, requiring the use of periodically varying noise statistics in analysis because the ac bias conditions are periodic functions of time. The figure of merit (FOM) [14] of this proposed QVCO is −189.7 dBc/Hz, and it is defined as…”

Section: Measurement Resultsmentioning

confidence: 99%

Quadrature Vco Formed With Two Colpitts Vco Coupled via an Lc-Ring Resonator

Jang¹,

Lin²,

Chang³

et al. 2011

PIER C

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Abstract-This paper presents a new quadrature voltage-controlled oscillator (QVCO), which consists of two p-core Colpitts cross-coupled voltage-controlled oscillators (VCOs) with an LC ring resonator to provide the quadrature outputs. The proposed CMOS QVCO has been implemented with the TSMC 0.18 µm CMOS technology and the die area is 0.478×0.82 mm 2 . At the supply voltage of 1.5 V, the total power consumption is 20.4 mW. The free-running frequency of the QVCO is tunable from 9.69 GHz to 10.52 GHz as the tuning voltage is varied from 0.0 V to 2 V. The measured phase noise at 1 MHz frequency offset is −122.41 dBc/Hz at the oscillation frequency of 10.52 GHz and the figure of merit (FOM) of the proposed QVCO is −189.7 dBc/Hz.

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“…This is beneficial for further improvement of phase noise [24]. The simulated phase noise ranges from 112 to 103 dBc/Hz and from 108 to 94 dBc/Hz at 1-MHz offset for the LB and HB VCOs, respectively.…”

Section: Voltage-controlled Oscillator (Vco)mentioning

confidence: 99%

A Scalable 6-to-18 GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS

Jeon

Wang

et al. 2008

IEEE J. Solid-State Circuits

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Abstract-This paper reports a 6-to-18 GHz integrated phasedarray receiver implemented in 130-nm CMOS. The receiver is easily scalable to build a very large-scale phased-array system. It concurrently forms four independent beams at two different frequencies from 6 to 18 GHz. The nominal conversion gain of the receiver ranges from 16 to 24 dB over the entire band while the worst-case cross-band and cross-polarization rejections are achieved 48 dB and 63 dB, respectively. Phase shifting is performed in the LO path by a digital phase rotator with the worst-case RMS phase error and amplitude variation of 0.5 and 0.4 dB, respectively, over the entire band. A four-element phased-array receiver system is implemented based on four receiver chips. The measured array patterns agree well with the theoretical ones with a peak-to-null ratio of over 21.5 dB.

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Concepts and methods in optimization of integrated LC VCOs

Cited by 583 publications

References 31 publications

More on the $1/{\rm f}^{2}$ Phase Noise Performance of CMOS Differential-Pair LC-Tank Oscillators

More on the $1/{\rm f}^{2}$ Phase Noise Performance of CMOS Differential-Pair LC-Tank Oscillators

Quadrature Vco Formed With Two Colpitts Vco Coupled via an Lc-Ring Resonator

A Scalable 6-to-18 GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS

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