The complete Raman spectrum of SnO 2 nanoparticles in presented and analyzed. In addition to the ''classical'' modes observed in the rutile structure, two other regions shown Raman activity for nanoparticles. The Raman bands in the low-frequency region are attributed to acoustic modes associated with the vibration of the individual nanoparticle as a whole. The high-frequency region is activated by surface disorder. A detailed analysis of these regions and the changes in the normal modes of SnO 2 are presented as a function nanoparticle size.

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High mobility bottom gate thin film transistors (TFTs) with an amorphous gallium tin zinc oxide (a-GSZO) channel layer have been produced by rf magnetron cosputtering using a gallium zinc oxide (GZO) and tin (Sn) targets. The effect of postannealing temperatures (200, 250, and 300°C) was evaluated and compared with two series of TFTs produced at room temperature (S1) and 150°C (S2) during the channel deposition. From the results, it was observed that the effect of postannealing is crucial for both series of TFTs either for stability as well as for improving the electrical characteristics. The a-GSZO TFTs (W∕L=50∕50μm) operate in the enhancement mode (n-type), present a high saturation mobility of 24.6cm2∕Vs, a subthreshold gate swing voltage of 0.38V/decade, a turn-on voltage of −0.5V, a threshold voltage of 4.6V, and an Ion∕Ioff ratio of 8×107, satisfying all the requirements to be used as active-matrix backplane.

Abstract-During the last years, oxide semiconductors have shown that they will have a key role in the future of electronics. In fact, several research groups have already presented working devices with remarkable electrical and optical properties based on these materials, mainly thin-film transistors (TFTs). Most of these TFTs use indium-tin oxide (ITO) as the material for source/drain electrodes. This paper focuses on the investigation of different materials to replace ITO in inverted-staggered TFTs based on gallium-indium-zinc oxide (GIZO) semiconductor. The analyzed electrode materials were indium-zinc oxide, Ti, Al, Mo, and Ti/Au, with each of these materials used in two different kinds of devices: one was annealed after GIZO channel deposition but prior to source/drain deposition, and the other was annealed at the end of device production. The results show an improvement on the electrical properties when the annealing is performed at the end (for instance, with Ti/Au electrodes, mobility rises from 19 to 25 cm 2 /V · s, and turn-on voltage drops from 4 to 2 V). Using time-of-flight secondary ion mass spectrometry (TOF-SIMS), we could confirm that some diffusion exists in the source/drain electrodes/semiconductor interface, which is in close agreement with the obtained electrical properties. In addition to TOF-SIMS results for relevant elements, electrical characterization is presented for each kind of device, including the extraction of source/ drain series resistances and TFT intrinsic parameters, such as µ i (intrinsic mobility) and V Ti (intrinsic threshold voltage).

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A nonvacuum and low temperature process for passivating transparent metal oxides based thin-film transistors is presented. This process uses the epoxy-based SU-8 resist which prevents device degradation against environmental conditions, vacuum or sputtering surface damage. The incorporation of SU-8 as a passivation layer is based on the ability of this polymer to provide features with high mechanical and chemical stability. With this approach, lithography is performed to pattern the resist over the active area of the device in order to form the passivation layer. The resulting transistors demonstrate very good electrical characteristics, such as μFE=61 cm2/V s, VON=−3 V, ON/OFF=4.4×109, and S=0.28 V/dec. Electrical behavior due to the SU-8/metal oxide interface characteristics is also reported on the basis of Fourier transform infrared analysis. In contrast, we demonstrate how sputtering of SiO2 as a passivation layer results in severely degraded devices that cannot be switched-off. In order to obtain proper working devices, it is shown that SU-8 should be hard baked at 200 °C for 1 h in order to obtain a highly cross-linked polymer network. The stability of SU-8 passivated devices over the time of storage, under current bias stress and vacuum conditions is also demonstrated.

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