A new inverse gas chromatographic methodology is introduced to measure local (homogeneous) adsorption energies, , local monolayer capacities, c max / , and adsorption isotherms, θ i (p,T, ) for probe gases on heterogeneous solid surfaces in the presence of nitrogen as carrier gas. The method does not depend on analytical solutions of the classical integral equation comprising the adsorption energy distribution function f( ) as unknown, nor on numerical solutions and estimations from this equation, using powerful computers.It simply uses a time function of the chromatographic peaks obtained by short flow-reversals of the carrier gas, combined with the local isotherm model of Jovanovic. All three adsorption parameters , c max / , and θ i (p,T, ) mentioned above can be calculated as a function of the experimental time and refer to instantaneous equilibration of the probe gases with the heterogeneous surface, with different kinds of active sites i being involved at different times. The kinetic physicochemical parameters for the adsorption phenomenon are also included for the gas/solid systems studied, being C

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Abstract-This paper presents the online conduction of the System Design with DSPs laboratory sessions through the R-DSP Lab (Remote Digital Signal Processor Laboratory). This interactive RL (Remote Laboratory) supports the verification of DSP applications which are written offline by the students in C and/or assembly programming language, through an internet accessible and user friendly control environment. The latest and most important feature of the R-DSP Lab which is also proposed in this paper, is the remote control of student's DSP applications through GUIs (Graphical User Interfaces) developed by them. In order to demonstrate the above feature, the implementation and verification processes of one laboratory session are presented. The assessment and evaluation results of both the System Design with DSPs laboratory sessions and the R-DSP Lab, are also discussed.

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Abstract-The purpose of this paper is to present an approach which could expand the features of Remote Laboratories focused on embedded Digital Signal Processing (DSP) systems. The proposed approach is based on a system which is designed and developed with LabVIEW and is called R-DSP Server. Exploiting this system, users are able to develop their own Graphical User Interfaces (GUIs), named Customized GUIs, for the remote control and validation of real-time DSP applications. These GUIs are tailored to the needs of each DSP application and can be implemented in any programming language. The rapid design of Customized GUIs using LabVIEW for the communication with the R-DSP Server is achieved utilizing an implemented set of functions, called R-DSP LabVIEW Toolkit.

Field Programmable Gate Arrays (FPGAs) are in use to build high performance image processing systems . This paper presents the design and implementation of such an open FPGAbased Digital Camera System for image capturing and real-time image processing. Images captured with a CMOS sensor are initially stored in the system's memory and then they are displayed on an LCD Touch Panel. The main goal of this proposed architecture is to be used as a platform to implement and test advance image processing algorithms. Apart of thi s, the system supports the control of the image sensor, through the LCD Touch Panel. In addition, has the ability to communicate with a PC through a JTAG interface for storing the images on it. The structural element for th is proposed architecture was chosen to be the low cost and widely used at universities, Altera's DE2 development board.I. INTROD UCTIONThe constant reduction both of cost and size of image sensors and the increasing complexity of FPGA circuits let us to design and implement an FPGA-based Digital Camera System. Also, due to the appearance of the LCD Touch Panels this system could be able to be controlled from such a panel. Furthermore, the flexibility of FPGAs gives us the possibility to integrate additional applications and image processing algorithms to the system without any cost in hardware [1-3]. It's worth mentioning that the hardware image processing algorithms could be faster than the corresponding algorithms in CIC++.For the implementation of this system the development platform DE2 by Altera, the TRDB-D5M Camera and the TRDB-LTM LCD Touch Panel by Terasic have been chosen [5][6][7][8]. Some of the DE2's 1I0s have been used for the interconnection of the Camera and the LCD Touch Panel as well as for the communication between the DE2 and a Pc. Apart from the memories and the IIOs, the DE2 has a Cyclone II EP2C35 FPGA by Altera. This FPGA has 33216 logic elements , 483840 memory bits, 70 embedded multipliers and 4 Phase Locked Loops (PLL). The interfacing of all DE2's hardware components can be achieved through the FPGA. For the implementation of the system which is presented in block diagram in Fig.

This paper presents the design and implementation of an image processing system which is based on the NIOS II softcore embedded processor of Altera. The proposed system which has an open architecture, stands as a useful and flexible platform for the implementation and testing of customized image processing algorithms in hardware. This system is implemented on the FPGA (Field Programmable Gate Array) of the Altera's DE2-70 development platform utilizing the features of Quartus II SoPC (System on a Programmable Chip) builder. It undertakes the real-time processing of images which are either captured by the Terasic's TRDB-D5M camera or they are loaded on system's memory through the available SD (Secure Data) card during the system initialization. The user through the Terasic's TRDB-LTM LCD (Liquid Crystal Display) touch panel controls the operation of the proposed system and observes the results of the selected image processing algorithm.