The advantages and the flexibility introduced into the hardware implementation by partial dynamic reconfiguration have rapidly changed the design flow of embedded systems. Although nowadays it is common to deal with systems characterized by a dynamic architecture able to manage and to adapt themselves to extremely different working scenarios, it is not so easy to provide such flexibility also into the software part of these systems. In order to cope with this problem we developed an innovative modular Linux driver that greatly simplifies the software handling of reconfiguration, allowing the programmer to concentrate on a hierarchical view of the system to be implemented. This methodology can be applied to different architectures providing a powerful and flexible software solution and, at the same time, it can be easily customized to respond to specific behaviors and requirement

It is common nowadays to employ fpgas, not only as a means of rapidly prototyping and testing dedicated solutions, but also as a platform on which to implement actual production systems. The latter case comes in two flavors: Compile Time Reconfigurable systems, in which the configuration of the fpga is done once and is never changed, or Run Time Reconfigurable systems, where the configuration of the chip is modified during the execution [6].Although modern fpgas allow the designer to modify dynamically even only portions of the chip, to this date there is a lack of satisfying design methodologies that using only non-proprietary widely available tools make it possible to optimally implement a high-level specification into a partially dynamically reconfigurable system.The aim of this work is to propose a methodology for solving this problem. The main features of the Caronte methodology [1, 2] (which targets a board equipped with a Xilinx Virtex-ii Pro fpga with a Powerpc 405 processor) are: 1. full exploitation of partial dynamic reconfiguration; 2. the reconfiguration is internal (on the fpga a microprocessor handles the reconfiguration through the icap module -thus reducing the reconfiguration times; e.g. [4]); 3. a real-time unix-like operating system helps the management of complex systems with multiple tasks, and simplifies reconfiguration through an optimized device driver.The Hardware Architecture. Let us first describe the architecture of the solution resulting from the Caronte Methodology.In order to manage reconfiguration internally it is necessary to always have a processing element running on the chip that communicates with the icap port. This means that it will be necessary to have a part of the fpga which always remains the same during runtime (the fixed side, managing reconfiguration) while the rest of the available area is free for dynamic reconfiguration (the reconfigurable side).The reconfigurable side can at any instant be viewed as the collection of a certain number of independent functionalities which are mapped on the chip as need be. Hence the area of the reconfigurable part is divided in rectangular boxes, all sharing a minimal interface that allows them to interact with the rest of the system, such as the ibm CoreConnect bus. These boxes are called BlackBox es. Aside from that, each BlackBox has also a processing layer part which can be reconfigured to various tasks, always retaining the communication functionalities offered by the communication layer. The bus macro technology is used to establish unchanging routing channels between modules. From the implementation point of view, this means that each BlackBox is in fact an edk component made up of two vhdl, Verilog or edif files, the first one containing the architecturedependent logic interface and the second one the processing element hardware description.As for the fixed side is made up of six components: ICAP, used to read/write a configuration from/to the bram; IPCore Manager (ipcm), a layer between the kernel of the operating system t...

This paper aims at introducing a complete methodology that allows to easily implement on an fpga a system specification by exploiting the capabilities of partial dynamic reconfiguration provided by the modern boards. In the resulting system, which includes a set of fixed components (such as a processor and a controller) as well as some reconfigurable area (which can be allotted to different tasks running concurrently and replaced independently of one another-thus possibly hiding reconfiguration times), reconfiguration is handled internally by the system, without the use of external hardware. In order to meet the software requirements of complex systems, the solution is provided with a porting of a real-time gnu/Linux os, µCLinux, which allows software processes to exploit a rich set of features, and with a Linux module that simplifies and enhances the handling of reconfiguration.