Caronte: A methodology for the Implementation of Partially dynamically Self-Reconfiguring Systems on FPGA Platforms

Abstract

This paper aims at introducing a complete methodology that allows to easily implement on an fpga a system specification by exploiting the capabilities of partial dynamic reconfiguration provided by the modern boards. In the resulting system, which includes a set of fixed components (such as a processor and a controller) as well as some reconfigurable area (which can be allotted to different tasks running concurrently and replaced independently of one another-thus possibly hiding reconfiguration times), reconfiguration is handled internally by the system, without the use of external hardware. In order to meet the software requirements of complex systems, the solution is provided with a porting of a real-time gnu/Linux os, µCLinux, which allows software processes to exploit a rich set of features, and with a Linux module that simplifies and enhances the handling of reconfiguration.

FPGA Dynamic and Partial Reconfiguration

“…The Caronte methodology [Donato et al 2007] takes a fixed task-graph as input and determines how to allocate tasks to the regions specified by the designer in order to complete execution of the application with dynamic loading of tasks. The designer is assumed to have determined how many regions to use and to have floorplanned them.…”

Design automation for partially reconfigurable adaptive systems

“…OpenPR is functionally close to the Xilinx PR design flow [41]. Xilinx [38] Altera [40] OpenPR [41] GoAhead [43] Caronte [46] GePaRD [48] Abel [49] Robertson [47] low-level implementation, and this must be done by the designer, manually. Only [46] supports partial run-time management using an embedded Microblaze processor to control PR regions that house independent accelerator tasks.…”