XPM- and XGM-Based Optical RAM Memories: Frequency and Time Domain Theoretical Analysis

Integrated Optical Content Addressable Memories (CAM) and Optical Random Access Memories (RAM) for Ultra-Fast Address Look-Up Operations

“…The use of discrete SOA-MZIs interconnected to fiber-pigtailed monolithic integrated FF-devices allows us to overcome the critical speed determining factor of the large intra-FF coupling distance [42,43] and facilitates the full characterization of each RAM cell and CAM cell independently, without any speed limitation, when unidirectional data-communication is employed. However, the latency of the fiber-network of the complete optical ML architecture introduces some latency in the overall destination address resolution, when the content comparison output of the CAM cell has to be propagated to the RAM cell for a Read operation.…”

“…In this paper, our analysis draws from the architecture of an FF memory with two cross-coupled asymmetric SOA-MZI switches, as illustrated in Figure 2a, which was initially developed in [37] and more recently theoretically investigated in the time and frequency domain in [43]. Each SOA-MZI switch features one SOA (SOA1 and SOA2) at the lower branch and a phase shifting element (Φ1 and Φ2) at the upper branch for controlling the biasing conditions of the interferometer.…”

“…In this arrangement, the two logical values of the data-bit stored in the FF-memory, logical "1" and "0", can be associated with the high optical power of the wavelength-signal emerging at the two outputs. The present FF memory configuration was initially demonstrated as a hybridly integrated module in [37] with the use of silica-on-silicon integration technology, exhibiting a total footprint of 45 × 12 mm 2 and coupling length between the two SOAs of 2.5 cm, which was theoretically shown to be the main speed determining factor of the memory architecture [42,43].…”

“…Following the conclusions drawn by the underlying theory on the critical performance parameters [42,43], an integrated version of the SR FF was presented using library-based components of a generic monolithic InP platform [33], to benefit from an integration technique that offers the possibility to fabricate multiple active and passive photonic components on a single chip at a close proximity. The two SOA-MZI switches were fitted in a die footprint-area of 6 × 2 mm 2 and cross-coupled together through a 5 mm-long coupling waveguide.…”

“…Optical FFs, serving as optical storing units, were then combined with random access controlling gates, forming functional optical RAMs, so far demonstrated either as fully functional architectures using mature SOA-based devices [37][38][39] or as discrete components based on photonic crystals [40,41]. These have both been experimentally shown to support speeds beyond 10 Gb/s, while in-depth frequency theoretical memory speed analyses [42,43] and validated time-domain SOA-based memory simulations [43,44] have revealed potential rates of up to 40 Gb/s. Furthermore, by combining optical Column/Row Address Selectors [45,46] and optical Tag Comparators [47], the first designs of a complete optical cache memory architecture for high-performance computers revealed a 16 GHz operation via physical layer simulations [48].…”