Wide bandwidth single and three-phase PLL structures for grid-tied PV systems

Amuda, L.N.; Filho, Braz J. Cardoso; Silva, S.M.; Silva, S.R.; Diniz, Antônia Sônia Alves Cardoso

doi:10.1109/pvsc.2000.916220

Cited by 38 publications

(26 citation statements)

References 2 publications

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“…It can be seen from (23) that the output of the AF is identical to the input signal, and that 1 w and 2 w are the amplitude of input signal and zero in the steady state, respectively. When 2 w converges to zero, the input to the DC offset elimination loop also becomes zero in Fig.…”

Section: T V W T Y T W T T W T T V T (23)mentioning

confidence: 99%

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A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

Huang¹,

Dong²,

Fang³

et al. 2016

Journal of Power Electronics

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This paper presents a new orthogonal signals generator (OSG) with DC Offset rejection for implementing a phase locked loop (PLL) in single-phase grid-connected power systems. An adaptive filter (AF) based on the least mean square (LMS) algorithm is used to constitute the OSG in this study. The DC offset in the measured grid voltage signal can be significantly rejected in the developed OSG technique. This generates two pure orthogonal signals that are free from the DC offset. As a result, the DC offset rejection performance of the presented single-phase phase locked loop (SPLL) can be enhanced. A mathematical model of the developed OSG and the principle of the adaptive filter based SPLL (AF-SPLL) are presented in detail. Finally, simulation and experimental results demonstrate the feasibility of the proposed AF-SPLL.

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Section: T V W T Y T W T T W T T V T (23)mentioning

confidence: 99%

“…In [2] and [3], the orthogonal frame was created through the use of an inverse park transformation. This method is simple.…”

Section: Introductionmentioning

confidence: 99%

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

Huang¹,

Dong²,

Fang³

et al. 2016

Journal of Power Electronics

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“…Systems such as those in [11,21,22], use an Inverse Park's transform to generate the voltage orthogonal component, as such, the DQ currents cannot be generated and a mixed reference frame control is needed. This method can be shown to be equivalent to the M-PD case in the stationary frame (see Appendix), but in practical implementation, needs LPFs to help generate the desired ω e and θ e values, thus reducing synchronization speeds and degrading performance.…”

Section: Synchronous Frame (Dq) Pllmentioning

confidence: 99%

“…Other methods, such as the second-order generalized integrator (SOGI) [1] and Inverse Park's transform [11,21,22], generate accurate orthogonal signals and attenuated higher order harmonic terms; which is desirable for ω and θ estimation. For DQ control though, the DQ terms should not be attenuated; control should regulate see them un-attenuated.…”

Section: Introductionmentioning

confidence: 99%

Phase-Locked Loops using State Variable Feedback for Single-Phase Converter Systems

Thacker

Wang

Dong

et al. 2009

2009 Twenty-Fourth Annual IEEE Applied Power Electronics Conference and Exposition

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A crucial component of a grid-connected converter system is the Phase-Locked Loop (PLL) that synchronizes the control to the grid voltage. Accurate, fast responding PLLs are required to provide phase angle and frequency measurements of the grid voltage for control and protection purposes. This paper proposes novel feedback mechanisms using the estimated frequency and phase in single-phase PLLs (in the stationary and rotating reference frames) which enhances performance. The estimated frequency ripple is eliminated without using low-pass filters (LPFs), and feedback terms are shown to improve the synchronization speed, by as much as 80% in some cases. Mathematical analyses, simulation, and hardware results are presented to verify the methods.

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“…In order to avoid the grid disturbances to affect the phase estimation, a car efully c hoice o f the t uning p arameters o f t he PI re gulator has t o be done , so th at a good di sturbance rejection is o btained [21]. H owever, t his a pproach makes t he SRF-PLL extremely slow if a good rejection of the unbalance disturbance is required.…”

Section: Introductionmentioning

confidence: 99%

An Adaptive Synchronous-Reference-Frame Phase-Locked Loop for Power Quality Improvement in a Polluted Utility Grid

González-Espín

Figueres

Garcerá

2012

IEEE Trans. Ind. Electron.

265

112

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Wide bandwidth single and three-phase PLL structures for grid-tied PV systems

Cited by 38 publications

References 2 publications

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

A New Orthogonal Signal Generator with DC Offset Rejection for Single-Phase Phase Locked Loops

Phase-Locked Loops using State Variable Feedback for Single-Phase Converter Systems

An Adaptive Synchronous-Reference-Frame Phase-Locked Loop for Power Quality Improvement in a Polluted Utility Grid

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