2005
DOI: 10.1109/tcad.2004.841071
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VHDL-AMS and Verilog-AMS as alternative hardware description languages for efficient modeling of multidiscipline systems

Abstract: Abstract-This paper focuses on commonalities and differences between the two mixed-signal hardware description languages VHDL-AMS and Verilog-AMS in the case of modeling heterogeneous or multi-discipline systems. The paper has two objectives. The first one consists of modeling the structure and the behavior of an airbag system using both the VHDL-AMS and the Verilog-AMS languages. Such a system encompasses several time abstractions (i.e. discrete-time and continuous-time), several disciplines, or energy domain… Show more

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Cited by 170 publications
(66 citation statements)
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“…In [27][28][29] complex mixed-signal electronics and telecommunication systems have been designed using VHDL-AMS as an effective simulation language. In [30,31] VHDL-AMS is suggested to model complex electronic systems with a varying hierarchical depth and interacting inside the automotive environment.…”
Section: Simulation Frameworkmentioning
confidence: 99%
“…In [27][28][29] complex mixed-signal electronics and telecommunication systems have been designed using VHDL-AMS as an effective simulation language. In [30,31] VHDL-AMS is suggested to model complex electronic systems with a varying hierarchical depth and interacting inside the automotive environment.…”
Section: Simulation Frameworkmentioning
confidence: 99%
“…This language is particularly suitable for the description of behaviour of systems interfaced with electrical networks [21]. A VHDL-AMS model of the transducer/resonator block can be seen as an electrical dipole behaving as a variable capacitor.…”
Section: A Vhdl-ams Model Of the Transducer/resonatormentioning
confidence: 99%
“…The Functional view describes the ideal equations of the function to be implemented. The Behavioral view is more detailed and contains refined equations that fit the circuit non-ideal behavior [42], [43]. The Connectical view is an empty model used to verify that blocks are well connected, without any functional equations.…”
Section: Analog Ip Packagementioning
confidence: 99%