2015
DOI: 10.1149/2.0371508jes
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Vertical and Smooth Single-Step Reactive Ion Etching Process for InP Membrane Waveguides

Abstract: In this paper we present a novel single-step RIE process for InP membrane optical waveguide etching. The optimization of the process is focused on the sidewall verticality and surface roughness of the etched profile. Significant improvement on the etched profile is achieved for the first time in a single-step RIE process. Loss measurement on fabricated membrane waveguides etched with the proposed RIE process results in a record low waveguide propagation loss (2.5 dB/cm).

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Cited by 29 publications
(27 citation statements)
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“…The lower intrinsic InP core (300 nm thick) acts as the passive waveguiding layer. With a width of 400 nm, the passive waveguide can support both fundamental tranverse electric (TE) and transverse magnetic (TM) modes, and provides high optical confinement, low propagation loss [11,12] and sharp bending [13].…”
Section: Chip Fabricationmentioning
confidence: 99%
“…The lower intrinsic InP core (300 nm thick) acts as the passive waveguiding layer. With a width of 400 nm, the passive waveguide can support both fundamental tranverse electric (TE) and transverse magnetic (TM) modes, and provides high optical confinement, low propagation loss [11,12] and sharp bending [13].…”
Section: Chip Fabricationmentioning
confidence: 99%
“…An InGaAsP layer (not shown in the figure) between n-InP and i-InP is used as an etch-stop layer. Afterwards, electron beam lithography (EBL) is used with a C 60 /ZEP resist [16] to pattern the PD mesa, passive WGs, and surface grating couplers, followed by a dry etching process using RIE [17]. The width of the PD mesa is designed slightly larger than that of the n-contact, so that the rough edges of the metals will not transfer to the etched PD mesa.…”
Section: Design and Fabricationmentioning
confidence: 99%
“…In order to determine the responsivity of the UTC-PD, the coupling loss from fiber to WG is first determined using standard WG-loss measurement on reference WG arrays fabricated on the same chip [17], and calibrated out. The responsivity of the 3×10 µm 2 UTC-PD measured at -4 V is plotted as a function of wavelength in Fig.…”
Section: Static Measurementsmentioning
confidence: 99%
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“…Only electrical contacts are needed between the electronic and photonic layers, which substantially reduces alignment requirements as compared to optical couplings. The technology developed to realize these membrane circuits is described in [4,5]. Using optimized E-beam lithography and plasma etching, double sided processing of the membrane and careful bonding to silicon carrier wafers, high quality waveguides and a range of well-performing photonic devices are demonstrated.…”
Section: Imos Conceptmentioning
confidence: 99%