Variable supply-voltage scheme for low-power high-speed CMOS digital design

Abstract

This paper describes a variable supply-voltage (VS) scheme. From an external supply, the VS scheme automatically generates minimum internal supply voltages by feedback control of a buck converter, a speed detector, and a timing controller so that they meet the demand on its operation frequency. A 32-b RISC core processor is developed in a 0.4-m CMOS technology which optimally controls the internal supply voltages with the VS scheme and the threshold voltages through substrate bias control. Performance in MIPS/W is improved by a factor of more than two compared with its conventional CMOS design. Index Terms-Buck converter, low power CMOS circuits, low threshold voltage, low voltage.

Dynamic voltage and frequency scaling scheme for an adaptive LDPC decoder using SNR estimation

“…When the frequency determined by the frequency scaling scheme is provided to the voltage supply block, the proper supply voltage is generated so that the LDPC decoder should operate without any timing violations. Kuroda et al originally proposed the voltage supply block, and the detailed discussion is found in [12].…”

“…To apply the proposed DVFS scheme to an LDPC decoder, we designed a DVFS controller composed of a frequency selector and a supply voltage generator. A look-up table is used for the frequency selector, and the supply voltage generator is based on the variable supply voltage scheme suggested in [12]. Various performance evaluations were conducted to make sure that slowing the performance through DVFS would not violate the throughput requirement of the CMMB standard.…”

An adaptive energy-conserving strategy for parallel disk systems

“…The DVS technique can dynamically reduce the voltage supplies of processors to conserve energy consumption in processors (see, for example, [21]). Thus, processor voltage supplies are scaled down to the most appropriate levels, thereby quadratically reducing power whenever possible.…”

Limits to Performance Spread Tuning using Adaptive Voltage and Body Biasing

“…[1], Transmeta's LongRun [2], Intel's Enhanced SpeedStep [3] are vivid examples of commercial ICs that use power management based on power supply scaling. In addition, chip demonstrators with V DD and V th scaling capabilities have also been reported in the literature archival [4]- [8]. Other reported uses of V DD and V th scaling, besides power management in processors, are in testing [9], product binning [10], and yield tuning [11].…”