Ultrathin flexible InGaZnO transistor for implementing multiple functions with a very small circuit footprint

Dai, Chaoqi; Chen, Peiqin; Qi, Shaocheng; Hu, Yongbin; Zhang, Song; Dai, Mingzhi

doi:10.1007/s12274-020-3074-4

Cited by 9 publications

(11 citation statements)

References 46 publications

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“…Owing to the low value of I GS (as shown in Figure S8), the energy consumption caused by the leakage current is neglected here. 12,49,50 The corresponding power consumption values are only 2.16 nW, 3.51 nW, 11.96 nW, 2.83 nW, and 0.019 nW, demonstrating the low-power-consumption photodetectors realized by adopting the fresh and easy-to-handle NW SGT. Figure 3e shows the power consumption of photodetectors working in the unsaturated and saturated regions in the literature.…”

Section: Nano Letters Pubsacsorg/nanolettmentioning

confidence: 99%

“…Meanwhile, the power consumption is an important parameter of the photodetectors, which can be calculated by eq . Owing to the low value of I GS (as shown in Figure S8), the energy consumption caused by the leakage current is neglected here. ,, The corresponding power consumption values are only 2.16 nW, 3.51 nW, 11.96 nW, 2.83 nW, and 0.019 nW, demonstrating the low-power-consumption photodetectors realized by adopting the fresh and easy-to-handle NW SGT. Figure e shows the power consumption of photodetectors working in the unsaturated and saturated regions in the literature. ,,,− , Obviously, the power consumption of the as-constructed SGT photodetector in this work is far below that of the reported photodetectors worked in the saturated region.…”

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confidence: 99%

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New Approach to Low-Power-Consumption, High-Performance Photodetectors Enabled by Nanowire Source-Gated Transistors

et al. 2022

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Power consumption makes next-generation large-scale photodetection challenging. In this work, the source-gated transistor (SGT) is adopted first as a photodetector, demonstrating the expected low power consumption and high photodetection performance. The SGT is constructed by the functional sulfur-rich shelled GeS nanowire (NW) and low-function metal, displaying a low saturated voltage of 0.61 V ± 0.29 V and an extremely low power consumption of 7.06 pW. When the as-constructed NW SGT is used as a photodetector, the maximum value of the power consumption is as low as 11.96 nW, which is far below that of the reported phototransistors working in the saturated region. Furthermore, benefiting from the adopted SGT device, the photodetector shows a high photovoltage of 6.6 × 10–1 V, a responsivity of 7.86 × 1012 V W–1, and a detectivity of 5.87 × 1013 Jones. Obviously, the low power consumption and excellent responsivity and detectivity enabled by NW SGT promise a new approach to next-generation, high-performance photodetection technology.

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Section: Nano Letters Pubsacsorg/nanolettmentioning

confidence: 99%

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confidence: 99%

New Approach to Low-Power-Consumption, High-Performance Photodetectors Enabled by Nanowire Source-Gated Transistors

et al. 2022

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“…As described in Fig. 3, compared to the existing memory designs, including memristors, magnetic RAMs, phasechange RAMs, and ferroelectric RAMs [21][22][23][24][25][26][27][28][29] , the proposed onetransistor memory device structure does not involve any capacitors, resistors, or advanced materials. Besides the much simpler structure, the MGT design possesses superior properties of shorter reading and writing time (both ~5 ns), as shown in Supplementary Fig.…”

Section: Memory Implementationmentioning

confidence: 99%

“…However, using the transistor side-gate design does not reduce the device footprint in the circuits, and none of the existing multi-gate designs aimed to reduce the transistor number for circuit simplification. In recent works, we proposed advanced designs to reduce the number of transistors used in a circuit, thereby effectively solving the downsizing problem in modern electronics 3,21,22 . Our previous works reported the simulation result 3 , and the bottom-gate structure of indium gallium zinc oxide transistor was mainly implemented in the lab with limited functions 21,22 .…”

mentioning

confidence: 99%

“…In recent works, we proposed advanced designs to reduce the number of transistors used in a circuit, thereby effectively solving the downsizing problem in modern electronics 3,21,22 . Our previous works reported the simulation result 3 , and the bottom-gate structure of indium gallium zinc oxide transistor was mainly implemented in the lab with limited functions 21,22 . Here, the proposed design is a top gate structure with process-in-memory function, which is compatible with and implemented by the Si-foundry lines processing, thus promising immediate and practical applications.…”

mentioning

confidence: 99%

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Multi-functional multi-gate one-transistor process-in-memory electronics with foundry processing and footprint reduction

et al. 2022

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Logic gates are fundamental components of integrated circuits, and integration strategies involving multiple logic gates and advanced materials have been developed to meet the development requirements of high-density integrated circuits. However, these strategies are still far from being widely applicable owing to their incompatibility with the modern silicon-based foundry lines. Here, we propose a silicon-foundry-line-based multi-gate one-transistor design to simplify the conventional multi-transistor logic gates into one-transistor gates, thus reducing the circuit footprint by at least 40%. More importantly, the proposed configuration could simultaneously provide the multi-functionalities of logic gates, memory, and artificial synapses. In particular, our design could mimic the artificial synapses in three dimensions while simultaneously being implemented by standard silicon-on-insulator process technology. The foundry-line-compatible one-transistor design has great potential for immediate and widespread applications in next-generation multifunctional electronics.

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Boolean Logic Computing Based on Neuromorphic Transistor

Wang

Sun

et al. 2023

Adv Funct Materials

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General‐purpose computers usually use logic gate computing units based on complementary metal oxide semiconductors (CMOS). Due to the separate memory and computing units in Von Neumann architecture, data transmission requires great energy and time consumption. Developing novel neuromorphic devices and comprehensively investigating their logical computing mode are crucial to achieve high‐performance and low‐power neuromorphic computation. Here, a systematic summary of Boolean logic computing based on emerging neuromorphic transistors is presented. This summary encompasses logical operation modes, materials, device structures, and working mechanisms. The input mode of Boolean logic operation is classified into electrical input, optical input, and synergistic optical/electrical input. Besides, additional modulation strategies to construct programmable logic functions by electrical, optical, and thermal signals are also summarized. These strategies hold great significance as they enable dynamic reconfiguration of logic operations and provide neuromorphic devices with decision‐making capabilities. Finally, the application prospects and current challenges to Boolean logic computing based on dendritic integration are discussed from the aspects of device integration, synergistic input/modulation modes, auxiliary peripheral circuit, software/hardware system, etc. It is believed that comprehensive investigations on neuromorphic Boolean logic operations are crucial to push forward the development of future neuromorphic computing toward high efficiency and high integration density.

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Ultrathin flexible InGaZnO transistor for implementing multiple functions with a very small circuit footprint

Cited by 9 publications

References 46 publications

New Approach to Low-Power-Consumption, High-Performance Photodetectors Enabled by Nanowire Source-Gated Transistors

New Approach to Low-Power-Consumption, High-Performance Photodetectors Enabled by Nanowire Source-Gated Transistors

Multi-functional multi-gate one-transistor process-in-memory electronics with foundry processing and footprint reduction

Boolean Logic Computing Based on Neuromorphic Transistor

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