Ultrahigh-Speed 0.5 V Supply Voltage $\hbox{In}_{0.7} \hbox{Ga}_{0.3}\hbox{As}$ Quantum-Well Transistors on Silicon Substrate

Effect of bulk growth temperature on antiphase domain boundary annihilation rate in MOCVD-grown GaAs on Si(001)

“…Threading dislocation density can be reduced through the use of buffer layers to alleviate lattice strain [3][4][5][6]. GaAs is a good candidate for a buffer layer material because of its intermediate lattice constant between InGaAs/InAs and Si and so it is important to first obtain high-quality epitaxy of GaAs on Si.…”

Heterogeneously grown tunable group-IV laser on silicon

“…However, current Si-based complimentary metal-oxide-semiconductor (CMOS) technology is nearing the physical limits of its scaling potential, and with the end in sight of the traditional technology roadmap [1], only a radical departure from Si-based technologies can ensure continued technological progress [2]. New material innovations [3][4][5], novel device architectures [6][7][8][9], heterogeneous technology co-integration [10], new functionalities [11], and their monolithic integration onto Si are projected to continue transistor miniaturization beyond the Si CMOS era. Moreover, interconnect bottlenecks for both inter-chip and intra-chip communication are projected to be major impediments to energy-efficient performance scaling.…”

Investigation of scalability of In0.7Ga0.3As quantum well field effect transistor (QWFET) architecture for logic applications

“…Aggressive supply voltage scaling to 0.5 V and below while maintaining transistor performance is a direct path toward reducing power consumption. In this regard, III-V compound semiconductor based quantum well field effect transistors (QWFETs) have recently attracted attention for low-power logic applications [2][3][4]. High indium content indium gallium arsenide (In 0.7 Ga 0.3 As), indium arsenide (InAs) and indium antimonide (InSb) QWFETs exhibit excellent electron transport property at both low and high electric fields arising from a combination of: (i) low C-valley electron mass, (ii) reduced impurity scattering due to modulation doping, (iii) reduced interface roughness scattering because of epitaxially grown smooth interfaces and (iv) large energetic separation between C and L-valleys.…”

“…In Section 3, we investigate the effect of both lateral and vertical scaling on the In 0.7 Ga 0. 3 performance down to physical gate length of 15 nm. In Section 4, we extract the effective carrier mobility in short-channel QWFETs and conclude that, with aggressive L G scaling, the ballistic mobility limits the short channel mobility due to near ballistic transport in the channel, and conclude that the effective carrier injection velocity, v eff , near the source side is a quantitative and more pertinent indicator of transport in short-channel QWFETs than effective mobility.…”