Ultra-High Endurance and Low I<inf>OFF</inf> Selector based on AsSeGe Chalcogenides for Wide Memory Window 3D Stackable Crosspoint Memory

Ultrahigh drive current and large selectivity in GeS selector

“…Thus, compared to currently available OTS selectors summarized in Fig. 2f 14,17,[27][28][29][30][31] , GeS ones can provide drive current of >34 MA cm −2 , which is just smaller than reported B-Te device but ten times larger selectivity. This enables 3D stacking of selector/memory arrays with large PCM operation currents, while having good nonlinearity and reliability.…”

“…e Endurance cycles of GeS device maintaining stable high-and low-resistance state. f Comparison of selectivity and J ON of reported OTS devices with our work14,17,[27][28][29][30][31] . The ON current density and selectivity for other OTS selectors were calculated from currents and device sizes reported in related works.…”

To the Issue of the Memristor’s HRS and LRS States Degradation and Data Retention Time

“…Despite the fact that endurance of more than 10 12 switchings was observed, for example, in [6,47,50], and the required retention time was stated in [54][55][56][57], these results were achieved in the study of a single device.…”

“…Thus, a bit of information in the memristor memory cell is stored in the form of structural changes in the local region of the dielectric enclosed between the two conducting electrodes. Memristors with only two levels of electrical resistance (one-bit), integrated into the cross-bar architecture [2][3][4][5][6], and in 3D configura-tions [7,8], represent the foundation for future ultralarge integrated circuits of fast nonvolatile memory ReRAM with a long retention time. At the same time, multilevel (multibit) memristors with a set of intermediate discrete levels of electrical resistance of the cells (from 4 to 20) [9][10][11][12][13][14][15][16][17] offer the possibility of creating systems with a parallel computing mechanism and synaptic plasticity function, which is necessary for constructing recurrent neural networks and next generation artificial intelligence architectures [18][19][20][21].…”

Multi level cell (MLC) in 3D crosspoint phase change memory array

“…Among several selector options, the ovonic threshold switch (OTS) not only shows sufficient switching time and on-off ratio, but also shows unique potential because of its compatibility to PCM. The back-end-of-line (BEOL) compatible process to fabricate the PCM/barrier/OTS cells makes it a promising technology that is suitable for a 3D crosspoint array, providing a higher density solution than the 2D-array [6][7][8]. Recently, significant progresses have been reported for the 3D crosspoint technology, showing great potential for a OTS-PCM array to meet all the SCM application requirements at the same time [9,10].…”