Trench-gate-integrated superjunction lateral double-diffused MOSFET with low specific on-resistance

Abstract

In this paper, a new low-voltage planar gate superjunction (SJ) lateral double-diffused MOSFET (LDMOSFET) is presented. The proposed trench-gate-integrated SJ-LDMOSFET is composed of a conventional planar gate structure and a trench gate structure extending into a drift region through a channel region, which helps reduce both drift resistance and channel resistance. By device simulation, we confirmed that current crowding near the top surface was alleviated by the spread of electron current into the drift region through the accumulation layer of the trench gate. As a result, the specific on-resistance (RON · A) of the trench-gate-integrated SJ-LDMOSFET can be reduced by increasing SJ thickness (TSJ), and the trench-gate-integrated SJ-LDMOSFET with a TSJ of 4 µm achieved an RON · A of 0.47 mΩ·cm2 at a breakdown voltage of 97 V. This is about 14% lower than the one-dimensional Si limit.

Lateral Power Fin MOSFET With a High-k Passivation for Ultra-Low On-Resistance

“…The performance of the previous PLA-HK device is around the ''double-RESURF'' benchmark. The performance of the proposed FIN-HK device is not only better than the benchmark of ''silicon limit'', but also better than the reported prior art [3]- [6], [8], [21], [25]. Based on the above study, a significantly reduced on-state energy loss can be expected using the proposed FIN-HK device.…”

“…As a result, a significantly improved trade-off relationship between BV and R ON ,SP can be obtained. The simulation results show that the proposed device gains an excellent performance which not only overcomes the silicon limit but also surpasses the prior art [3]- [6], [8], [21], [25]. Fig.…”

“…Therefore, a variety of techniques have been reported to reduce the specific on-resistance (R ON ,SP ) at a given breakdown voltage (BV). For example, the techniques of reduced-surface-field (RESURF) [2], [3], lateral super-junction [4]- [6], deep trench [7], [8], [28], accumulation layer [9]- [11], optimum variation lateral doping [12], [13], dual paths [14], and high-k (HK).…”