Towards high performance sub-10nm finW bulk FinFET technology

Chiarella, T.; Kubicek, Stefan; Rosseel, Erik; Ritzenthaler, R.; Hikavyy, Andriy; Eyben, Pierre; Keersgieter, A. De; Ragnarsson, L.-Å.; Kim, M.-S; Chew, Soon Aik; Schram, T.; Demuynck, S.; Cupak, M.; Rijnders, L.; Dehan, M.; Horiguchi, N.; Mitard, J.; Mocuta, D.; Mocuta, A.; Thean, A.

doi:10.1109/essderc.2016.7599605

Cited by 17 publications

(12 citation statements)

References 15 publications

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“…The cross-sectional transmission electron microscopy (TEM) images [8,15] of the devices under test are shown in Figure 1. Both GAA NW-FETs and FinFETs were fabricated using the high-k replacement metal gate (HK-RMG) process [7,16,17].…”

Section: Methodsmentioning

confidence: 99%

“…The electrical characterizations were carried out under various temperature conditions from 25 to 125 °C. Both GAA NW-FETs and FinFETs were fabricated based on a conventional bulk FinFETs process flow [15] with the following particularities in the case of GAA NW-FETs, as shown in Figure 2. First, in order to suppress the short channel effect, a ground plane (GP) isolation implant was used [8].…”

Section: Methodsmentioning

confidence: 99%

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Comparison of Temperature Dependent Carrier Transport in FinFET and Gate-All-Around Nanowire FET

Kim

Jang

et al. 2020

Applied Sciences

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The temperature dependent carrier transport characteristics of n-type gate-all-around nanowire field effect transistors (GAA NW-FET) on bulk silicon are experimentally compared to bulk fin field effect transistors (FinFET) over a wide range of temperatures (25–125 °C). A similar temperature dependence of threshold voltage (VTH) and subthreshold swing (SS) is observed for both devices. However, effective mobility (μeff) shows significant differences of temperature dependence between GAA NW-FET and FinFET at a high gate effective field. At weak Ninv (= 5 × 1012 cm2/V∙s), both GAA NW-FET and FinFET are mainly limited by phonon scattering in μeff. On the other hand, at strong Ninv (= 1.5 × 1013 cm2/V∙s), GAA NW-FET shows 10 times higher dμeff/dT and 1.6 times smaller mobility degradation coefficient (α) than FinFET. GAA NW-FET is less limited by surface roughness scattering, but FinFET is relatively more limited by surface roughness scattering in carrier transport.

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Section: Methodsmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%

Comparison of Temperature Dependent Carrier Transport in FinFET and Gate-All-Around Nanowire FET

Kim

Jang

et al. 2020

Applied Sciences

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“…In this example, we calibrated the NDS model parameters using iN14 bulk FinFET hardware data from IMEC [22], [23]. This is done in three steps:…”

Section: A Calibrating Nds On In14 Hardwarementioning

confidence: 99%

Nano Device Simulator—A Practical Subband-BTE Solver for Path-Finding and DTCO

Stanojević¹,

Tsai²,

Strof³

et al. 2021

IEEE Trans. Electron Devices

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We present an in-depth discussion on the subband Boltzmann transport (SBTE) methodology, its evolution, and its application to the simulation of nanoscale MOSFETs. The evolution of the method is presented from the point of view of developing a commercial generalpurpose SBTE solver, the GTS nano device simulator (NDS). We show a wide range of applications SBTE is suited for, including state-of-the-art nonplanar and well-established planar technologies. It is demonstrated how SBTE can be employed both as a path-finding tool and a fundamental component in a DTCO-flow.

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“…Devices were fabricated by IMEC (Leuven, Belgium). A more detailed description of the fabrication process can be found in [82]. Silicon FinFETs in this chapter are based on the fabrication of multiple fins in parallel.…”

Section: Device Descriptionmentioning

confidence: 99%

“…As we mentioned above, the photoresponse behavior is attributed to a non-resonant (broadband) response of the detector related to overdamping of the plasma waves in the transistor channel. Since carrier mobility of the Silicon FinFETs is below 400 cm 2 /V•s (∼300 cm 2 /V•s for n-channel FinFETs and 150 cm 2 /V•s for p-channel ones) [82], none of these devices fulfill the resonance condition (ωτ>>1), even at the higher frequency range.…”

Section: Thz Measurementsmentioning

confidence: 99%

Silicon- and Graphene-based FETs for THz technology

Notario¹,

Antonio²

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Silicon-and Graphene-based FETs for THz technology This Thesis focuses on the study of the response to Terahertz (THz) electromagnetic radiation of different silicon substrate-compatible FETs. Strained-Si MODFETs, state-ofthe-art FinFETs and graphene-FETs were studied. The first part of this thesis is devoted to present the results of an experimental and theoretical study of strained-Si MODFETs. These transistors are built by epitaxy of relaxed-SiGe on a conventional Si wafer to permit the fabrication of a strained-Si electron channel to obtain a high-mobility electron gas. Room temperature detection under excitation of 0.15 and 0.3 THz as well as sensitivity to the polarization of incoming radiations were demonstrated. A two-dimensional hydrodynamic-model was developed to conduct TCAD simulations to understand and predict the response of the transistors. Both experimental data and TCAD results were in good agreement demonstrating both the potential of TCAD as a tool for the design of future new THz devices and the excellent performance of strained-Si MODFETs as THz detectors (75 V/W and 0.06 nW/Hz 0.5). The second part of the Thesis reports on an experimental study on the THz behavior of modern silicon FinFETs at room temperature. Silicon FinFETs were characterized in the frequency range 0.14-0.44 THz. The results obtained in this study show the potential of these devices as THz detectors in terms of their excellent Responsivity and NEP figures (0.66 kV/W and 0.05 nW/Hz 0.5). Finally, a large part of the Thesis is devoted to the fabrication and characterization of Graphene-based FETs. A novel transfer technique and an in-house-developed setup were implemented in the Nanotechnology Clean Room of the USAL and described in detail in this Thesis. The newly developed transfer technique enables to encapsulate a graphene layer between two flakes of h-BN. Raman measurements confirmed the quality of the fabricated graphene heterostructures and, thus, the excellent properties of encapsulated graphene. The asymmetric dual grating gate graphene FET (ADGG-GFET) concept was introduced as an efficient way to improve the graphene response to THz radiation. High quality ADGG-GFETs were fabricated and characterized under THz radiation. DC measurements confirmed the high quality of graphene heterostructures as it was shown on Raman measurements. A clear THz detection was found for both 0.15 THz and 0.3 THz at 4K when the device was voltage biased either using the back or the top gate of the G-FET. Room temperature THz detection was demonstrated at 0.3 THz using the ADGG-GFET. The device shows a Responsivity and NEP around 2.2 mA/W and 0.04 nW/Hz 0.5 respectively at respectively at 4K. It was demonstrated the practical use of the studied devices for inspection of hidden objects by using the in-house developed THz imaging system.

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Towards high performance sub-10nm finW bulk FinFET technology

Cited by 17 publications

References 15 publications

Comparison of Temperature Dependent Carrier Transport in FinFET and Gate-All-Around Nanowire FET

Comparison of Temperature Dependent Carrier Transport in FinFET and Gate-All-Around Nanowire FET

Nano Device Simulator—A Practical Subband-BTE Solver for Path-Finding and DTCO

Silicon- and Graphene-based FETs for THz technology

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