The temperature dependent carrier transport characteristics of n-type gate-all-around nanowire field effect transistors (GAA NW-FET) on bulk silicon are experimentally compared to bulk fin field effect transistors (FinFET) over a wide range of temperatures (25–125 °C). A similar temperature dependence of threshold voltage (VTH) and subthreshold swing (SS) is observed for both devices. However, effective mobility (μeff) shows significant differences of temperature dependence between GAA NW-FET and FinFET at a high gate effective field. At weak Ninv (= 5 × 1012 cm2/V∙s), both GAA NW-FET and FinFET are mainly limited by phonon scattering in μeff. On the other hand, at strong Ninv (= 1.5 × 1013 cm2/V∙s), GAA NW-FET shows 10 times higher dμeff/dT and 1.6 times smaller mobility degradation coefficient (α) than FinFET. GAA NW-FET is less limited by surface roughness scattering, but FinFET is relatively more limited by surface roughness scattering in carrier transport.
organic light-emitting diode (QD-OLED) product based on an oxide thin-film transistor (TFT) using an amorphous oxide semiconductor, indium-gallium-zincoxide (a-IGZO), which it will soon release. The QD-OLED has a high color gamut (BT2020 > 90%) and has excellent advantages over liquid crystal displays (LCDs) or OLEDs (BT2020, ≈75%). In the case of blue light (415-455 nm), which is harmful to eyesight, it emits only half that of existing LCDs and ≈30% that of OLEDs, emitting the lowest level among current displays. Furthermore, QD-OLEDs exhibit the best performance in all picture quality fields, such as viewing angle, reflectivity, and contrast. [6] It is important to secure the electrical stability of oxide TFTs in order to achieve high resolution, high brightness, and long life. The TFTs of the QD-OLED with the active-matrix operation basically consist of driving TFTs and switching TFTs. In the case of driving TFTs, which always supply a constant current, electrical stability is required under constant current stress (CCS) and positive bias thermal stress (PBTS). In the case of switching TFTs with a long turn-off state, it is essential to secure the stability under negative bias thermal illumination stress (NBTIS). To date, studies on the mechanism related to electrical stability have been continuously conducted on oxide TFTs using various oxide semiconductors, such as ZnO, ZnSnO, InGaZnO, InZnSnO, ZrInZnO, etc. [2,[7][8][9][10][11][12][13][14] The oxygen vacancies or oxygen interstitial model, [15][16][17][18][19][20][21] peroxide model, [22][23][24][25][26] and hydrogen complex model [27][28][29][30][31][32][33][34][35] for the oxide semiconductor itself are proposed mechanisms for electrical instability. Furthermore, the interface and near-interface defects between the oxide semiconductor and the insulating film of the upper and lower parts of the oxide TFT are also known to cause instability. First, in the case of the oxygen vacancy model, three things are known of the energy level in the electronic structure or chemical energy (spatial coordination with cation). There is an oxygen vacancy with two trapped electrons V o 0 near the valence band, a single charged oxygen vacancy with one trapped electron V o + , and a doubly charged oxygen vacancy with no trapped electron V o 2+ near the conduction band. These oxygen defects are known to cause An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT), which exhibits the best electrical stability (PBTS ≤ 0.009 V), is implemented to create quantum-dot organic light-emitting diode product. Electrical stability has been explained through various mechanisms involving defects related to oxygen and hydrogen. The defects of a-IGZO are identified and the parameters of the deposition process are utilized to obtain V o + and V Zn − values of 1.7 × 10 17 and 2.4 × 10 18 spins cm −3 , respectively, which are quantified using electron spin resonance for the first time. The defects of the gate insulator (GI) in the upper and lower parts of the a-IGZO TFT and ...
The carrier transport of p-type low temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) on flexible substrate has been intensively studied and compared to that on glass substrate in order to improve device performance. To investigate the origin of carrier transport on different substrates, temperature dependent characterizations are carried out for electrical device parameters such as threshold voltage (V TH ), subthreshold swing (SS), on-current (I on ) and effective carrier mobility (µ eff ). The poly-Si grain size L grain and the barrier height E B between grain boundaries are well known to be the main parameters to determine transport in polycrystalline silicon and can be extracted based on the polycrystalline mobility model. However, our systemic studies show that it is not grain size but E B that has more influence on the degradation of LTPS TFT on flexible substrates. The E B of flexible substrate is roughly 18 times higher than glass substrate whereas grain size is similar for both devices on different substrates. Compared to the LTPS TFT on glass substrate, higher E B degrades approximately 24 % of I on , 30 % of SS and 21 % of µ eff on the flexible substrate at room temperature. From low frequency noise (LFN) analysis, it is observed that the total trap density (N t ) for flexible substrate is up to four times higher than that of glass substrate, which also supports the high value of E B in the device fabricated on the flexible substrate.
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