Towards energy-proportional datacenter memory with mobile DRAM

Malladi, Venkat S.; Nothaft, Frank Austin; Periyathambi,; Lee, Myeong Soo; Kozyrakis,; Horowitz,

doi:10.1109/isca.2012.6237004

Cited by 178 publications

(89 citation statements)

References 34 publications

(24 reference statements)

Supporting

Mentioning

Contrasting

Order By: Relevance

“…For example, LPDDR memory technology first entered into mobile domain and recently is proposed as a solution for energy proportional servers [1]. Moreover, NVIDIA started introducing new revisions of their GPU architecture first in mobile segment, and later in the gaming workstations, and in turn into HPC.…”

Section: Introductionmentioning

confidence: 99%

The Mont-Blanc Prototype: An Alternative Approach for HPC Systems

Rajovic¹,

Rico

Mantovani

et al. 2016

SC16: International Conference for High Performance Computing, Networking, Storage and Analysis

View full text Add to dashboard Cite

Abstract-High-performance computing (HPC) is recognized as one of the pillars for further advance of science, industry, medicine, and education. Current HPC systems are being developed to overcome emerging challenges in order to reach Exascale level of performance, which is expected by the year 2020. The much larger embedded and mobile market allows for rapid development of IP blocks, and provides more flexibility in designing an application-specific SoC, un turn giving possibility in balancing performance, energy-efficiency and cost. In the Mont-Blanc project, we advocate for HPC systems be built from such commodity IP blocks, currently used in embedded and mobile SoCs.As a first demonstrator of such approach, we present the MontBlanc prototype; the first HPC system built with commodity SoCs, memories, and NICs from the embedded and mobile domain, and offthe-shelf HPC networking, storage, cooling and integration solutions. We present the system's architecture, and evaluation including both performance and energy efficiency. Further, we compare the system's abilities against a production level supercomputer. At the end, we discuss parallel scalability, and estimate the maximum scalability point of this approach across a set of applications.

show abstract

Section: Introductionmentioning

confidence: 99%

The Mont-Blanc Prototype: An Alternative Approach for HPC Systems

Rajovic¹,

Rico

Mantovani

et al. 2016

SC16: International Conference for High Performance Computing, Networking, Storage and Analysis

View full text Add to dashboard Cite

show abstract

“…Additionally, and as seen in the paper, the background power of the memory dominates the total server power as the power consumption of the SoC decreases. Therefore, memory technologies that exhibit lower background power than DDR4, such as mobile DRAM (LPDDR4), could be used to increase the energy proportionality of the servers [31].…”

Section: Discussionmentioning

confidence: 99%

Towards Near-Threshold Server Processors

Pahlevan¹,

Picorel²,

Pourhabibi³

et al. 2016

Proceedings of the 2016 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition (DATE)

View full text Add to dashboard Cite

Abstract-The popularity of cloud computing has led to a dramatic increase in the number of data centers in the world. The ever-increasing computational demands along with the slowdown in technology scaling has ushered an era of power-limited servers. Techniques such as near-threshold computing (NTC) can be used to improve energy efficiency in the post-Dennard scaling era. This paper describes an architecture based on the FD-SOI process technology for near-threshold operation in servers. Our work explores the trade-offs in energy and performance when running a wide range of applications found in private and public clouds, ranging from traditional scale-out applications, such as web search or media streaming, to virtualized banking applications. Our study demonstrates the benefits of near-threshold operation and proposes several directions to synergistically increase the energy proportionality of a near-threshold server.

show abstract

“…[33] discusses some of the differences in DDR2/3/4 memory timings, but does not show the effect on worst-case performance. The authors in [43] shows the bandwidth/energy efficiency trade-offs for different memories when applied in data centers, but it considers a smaller set of SDRAM generations compared to this article, and does not focus on worstcase performance. [44] compares several (asynchronous) DRAM architectures and considers SDRAM as one special case within this family, but does not zoom in further.…”

Section: Related Workmentioning

confidence: 99%

Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling

Goossens

Chandrasekar

Åkesson

et al. 2016

IEEE Trans. Comput.

View full text Add to dashboard Cite

Abstract-Real-time safety-critical systems should provide hard bounds on an applications' performance. SDRAM controllers used in this domain should therefore have a bounded worst-case bandwidth, response time, and power consumption. Existing works on real-time SDRAM controllers only consider a narrow range of memory devices, and do not evaluate how their schedulers' performance varies across memory generations, nor how the scheduling algorithm influences power usage. The extent to which the number of banks used in parallel to serve a request impacts performance is also unexplored, and hence there are gaps in the tool set of a memory subsystem designer, in terms of both performance analysis, and configuration options. This article introduces a generalized close-page memory command scheduling algorithm that uses a variable number of banks in parallel to serve a request. To reduce the schedule length for DDR4 memories, we exploit bank grouping through a pairwise bank-group interleaving scheme. The algorithm is evaluated using an ILP formulation, and provides schedules of optimal length for most of the considered LPDDR, DDR2, DDR3, LPDDR2, LPDDR3 and DDR4 devices. We derive the worst-case bandwidth, power and execution time for the same set of devices, and discuss the observed trade-offs and trends in the scheduler-configuration design space based on these metrics, across memory generations.

show abstract

Towards energy-proportional datacenter memory with mobile DRAM

Cited by 178 publications

References 34 publications

The Mont-Blanc Prototype: An Alternative Approach for HPC Systems

The Mont-Blanc Prototype: An Alternative Approach for HPC Systems

Towards Near-Threshold Server Processors

Power/Performance Trade-Offs in Real-Time SDRAM Command Scheduling

Contact Info

Product

Resources

About