The Mont-Blanc Prototype: An Alternative Approach for HPC Systems

Abstract

Abstract-High-performance computing (HPC) is recognized as one of the pillars for further advance of science, industry, medicine, and education. Current HPC systems are being developed to overcome emerging challenges in order to reach Exascale level of performance, which is expected by the year 2020. The much larger embedded and mobile market allows for rapid development of IP blocks, and provides more flexibility in designing an application-specific SoC, un turn giving possibility in balancing performance, energy-efficiency and cost. In the Mont-Blanc project, we advocate for HPC systems be built from such commodity IP blocks, currently used in embedded and mobile SoCs.As a first demonstrator of such approach, we present the MontBlanc prototype; the first HPC system built with commodity SoCs, memories, and NICs from the embedded and mobile domain, and offthe-shelf HPC networking, storage, cooling and integration solutions. We present the system's architecture, and evaluation including both performance and energy efficiency. Further, we compare the system's abilities against a production level supercomputer. At the end, we discuss parallel scalability, and estimate the maximum scalability point of this approach across a set of applications.

Efficient CFD code implementation for the ARM-based Mont-Blanc architecture

“…We can therefore expect that the real power efficiency gain ranges between these two values. Real measurements of the energy costs of Mont-Blanc nodes compared to MareNostrum III supercomputer from BSC can be found in [12]. In this study improvements of 1.7× are observed, thus supporting the estimation introduced in our current tests.…”

“…However, an estimation can be obtained based on the idle power (280 W) and the peak power (800 W) of a single node of MinoTauro. According to the previous measurements performed on Mont-Blanc system [12], in idle state a Mont-Blanc node consumes 5 W, increasing up to 11 W when running the LINPACK benchmark. Since our application is mainly constrained by the memory accesses, less than 3% of the peak performance is achievable in both systems.…”

“…Moreover, the use of mobile SoC missing PCIe links, forced the Mont-Blanc consortium to bridge USB3 to Ethernet. This design compromise increases the latency of the network as analyzed in [12]. Significant improvements are expected on these aspects in the next Mont-Blanc prototype which will be based on the Cavium ThunderX2 processor [3].…”

“…In the current version the Mont-Blanc prototype is composed of 930 nodes with the SoC Samsung Exynos 5 that combines an ARM Cortex-A15 CPU and an OpenCL capable Mali T604 GPU. The description of the hardware and general performance results can be found in [12]. A comparative study of the performance of the two devices composing each chip can be found in [13].…”

Performance and Power Analysis of HPC Workloads on Heterogeneous Multi-Node Clusters

“…Various attempts to take advantage of mobile technology for increasing energy efficiency of HPC systems have also been taken in the recent past. The closest to our work are the EU Mont-Blanc project [16,17] and the COSA project [18,19], but several other examples can be found in the literature [20][21][22][23].…”