2014
DOI: 10.1109/tns.2014.2365532
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Total Ionizing Dose Effects on DRAM Data Retention Time

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Cited by 17 publications
(8 citation statements)
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“…If not stated otherwise, all the measurements presented in this article were performed at 60 ± 0.3 • C by placing the test setup in a climate chamber with regulated temperature. This realistic operating temperature for a DRAM appears to be a good trade-off between the high temperature (85 • C) generally used in VRT studies (as mentioned in [18] and used in [9]) and the lower temperatures generally used in DRAM Single Event Effects (SEE) testing. It allows a significant activation of the leakage mechanisms to observe a large population of weak cells in the chosen time window while limiting the high temperature annealing effects expected at the maximum recommended operating temperature of 85 • C.…”
Section: Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…If not stated otherwise, all the measurements presented in this article were performed at 60 ± 0.3 • C by placing the test setup in a climate chamber with regulated temperature. This realistic operating temperature for a DRAM appears to be a good trade-off between the high temperature (85 • C) generally used in VRT studies (as mentioned in [18] and used in [9]) and the lower temperatures generally used in DRAM Single Event Effects (SEE) testing. It allows a significant activation of the leakage mechanisms to observe a large population of weak cells in the chosen time window while limiting the high temperature annealing effects expected at the maximum recommended operating temperature of 85 • C.…”
Section: Methodsmentioning
confidence: 99%
“…Radiation effects on DRAM retention time is also an active field of study. It is well-known that Total Ionizing Dose (TID) decreases the retention time of DRAM cells by enhancing their leakage current [6]- [9]. Displacement damage, likewise, is V. Goiffon known to increase the leakage current of DRAM cells and so, to reduce their retention time [10], [11].…”
Section: Introductionmentioning
confidence: 99%
“…However, in DRAMs most of the upsets happen in weakened cells [74]. Furthermore, compared with SRAMs, DRAMs are also more likely to suffer from stuck bits (cells stuck to a value, mostly related to variable bit retention [75]) and single event functional interrupts (SEFIs). The effect of SEFIs in a DRAM ranges from some tens of bits to a full chip wrong per read cycle and can be recovered only with a chip reset or sometimes with a full power cycle [74].…”
Section: Edac Codesmentioning
confidence: 99%
“…The study in this work started with a curiosity about the reactions of the mitigation circuit when weakened DRAMswhich can happen in many different ways, such as technology shrinkage, normal degradation, and radiationare row hammered. X-ray radiation damages the DRAM cells and induces the aging process, resulting in a shift in the threshold number [21]- [23]. X-ray inspections are commonly used in chip package assembly or product shipping, making the row hammering problems more serious.…”
Section: Introductionmentioning
confidence: 99%