The SOP for Miniaturized, Mixed-Signal Computing, Communication, and Consumer Systems of the Next Decade

Abstract

Abstract-From cell phones to biomedical systems, modern life is inexorably dependent on the complex convergence of technologies into stand-alone products designed to provide a complete solution in small, highly integrated systems with computing, communication, biomedical and consumer functions. The concept of system-on-package (SOP) originated in the mid-1990s at the NSF-funded Packaging Research Center at the Georgia Institute of Technology. This can be thought of as a conceptual paradigm in which the package, and not the bulky board, as the system and the package provides all the system functions in one single module, not as an assemblage of discrete components to be connected together, but as a continuous merging of various integrated thin film technologies in a small package. In the SOP concept, this is accomplished by codesign and fabrication of digital, optical, RF and sensor functions in both IC and the package, thus distinguishing between what function is accomplished best at IC level and at package level. In this paradigm, IC's are viewed as being best for transistor density while the package is viewed as being best for RF, optical and certain digital-function integration. The SOP concept is demonstrated for a conceptual broad-band system called an intelligent network communicator (INC). Its testbed acts as both a leading-edge research and teaching platform in which students, faculty, research scientists, and member companies evaluate the validity of SOP technology from design to fabrication to integration, test, cost and reliability. The testbed explores optical bit stream switching up to 100 GHz, digital signals up to 5-20 GHz, decoupling capacitor integration concepts to reduce simultaneous switching noise of power beyond 100 W/chip, design, modeling and fabrication of embedded components for RF, microwave, and millimeter wave applications up to 60 GHz. This article reviews a number of SOP technologies which have been developed and integrated into SOP test bed. These are 1) convergent SOP-based INC system design and architecture, 2) digital SOP and its fabrication for signal and power integrity, 3) optical SOP fabrication with embedded actives and passives, 4) RF SOP for high Q-embedded inductors, filters and other RF components, 5) mixed signal electrical test, 6) mixed signal reliability, and 7) demonstration of SOP by INC prototype system.

Placement and Routing for 3-D System-On-Package Designs

“…The wirelength is the sum of Manhattan distance in , and directions, where the direction is the height of the associated vias. 3 Let , and , respectively, denote the width, height, and area of the placement layer . Let , i.e., the product of the maximum width and the maximum height among all placement layers.…”

“…Recently, three-dimensional (3-D) packaging via system-on-package (SOP) [1]- [3] has been proposed as an alternative solution to meet the rigorous requirements of today's mixed signal system integration. 1 The SOP is about 3-D integration of multiple functions in a miniaturized package achieved by thin film embedding.…”

24-GHz LTCC Fractal Antenna Array SoP With Integrated Fresnel Lens

“…The multi-layer System-on-Package (SoP) approach has emerged as an effective solution to meet these stringent needs because it has the ability of vertically integrating embedded components for additional functionality and this provides compactness and cost-savings [1]. Low temperature co-fired ceramic (LTCC) is a leading thick film technology for SoP and provides a great medium for passives integration [2].…”

Analysis and Characterization of a High-Performance Ka-Band Surface Micromachined Elevated Patch Antenna

“…ITH THE ever-increasing demand for high performance, low cost and low-power wireless communication systems, the need for integrating all functional modules on a single chip or into a single package becomes more pronounced [1] [2]. There have been various efforts to fully integrate numerous antenna geometries onto MMIC-compatible wafers.…”