The influence of series resistance and interface states on intersecting behavior ofI–Vcharacteristics of Al/TiO₂/p-Si (MIS) structures at low temperatures

Abstract

In this study, we have investigated the intersection behavior of the forward bias current-voltage (I-V) characteristics of the Al/TiO 2 /p-Si (MIS) structures in the temperature range of 100-300 K. The intersection behavior of the I-V curves appears as an abnormality when compared to the conventional behavior of ideal Schottky diodes and MIS structures. This behavior is attributed to the lack of free charge at a low temperature and in the temperature region, where there is no carrier freezing out, which is non-negligible at low temperatures, in particular. The values calculated from the temperature-dependent forward bias I-V data exhibit unusual behavior, where the zero-bias barrier height (φ b0 ) and the series resistance (R s ) increase with increasing temperature. Such temperature dependence of φ b0 and R s is in obvious disagreement with the reported negative temperature coefficient. An apparent increase in the ideality factor (n) and a decrease in the φ b0 at low temperatures can be attributed to the inhomogeneities of the barrier height, the thickness of the insulator layer and non-uniformity of the interfacial charges. The temperature dependence of the experimental I-V data of the Al/TiO 2 /p-Si (MIS) structures has revealed the existence of a double Gaussian distribution with mean barrier height values ( φb0 ) of 1.108 eV and 0.649 eV, and standard deviations (σ s ) of 0.137 V and 0.077 V, respectively. Furthermore, the temperature dependence of the energy distribution of interface state density (N ss ) profiles has been determined from forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (φ e ) and n. The fact that the values of N ss increase with increasing temperature has been attributed to the molecular restructuring and reordering at the metal/semiconductor interface under the effect of temperature.

Influence of Atomic Layer Deposition Temperatures on TiO2/n-Si MOS Capacitor

“…Calculated values of R s are similar to previously published results (i.e. 2000-2500 ) by Pakma et al 21 Corrected capacitance, C c , and corrected equivalent parallel conductance, G c , are given by…”

“…21 Similarly, the capacitance also increases in the depletion region with decreasing frequency due to recombination and generation from the interface states. 28 This frequency dispersion in C-V characteristics is negligible in the inversion region.…”

Temperature‐dependent profile of the surface states and series resistance in (Ni/Au)/ AlGaN/AlN/GaN heterostructures

“…On the other hand, the existence of R s in these structures causes bending due to charge saturation, and plays a subtle role in keeping this intersection hidden. [14] When the temperature is increased, the generation of thermal carriers (electrons or holes) in semiconductor is enhanced both at positive and negative biased conditions. Therefore, the increase of C with the temperature for I. Taşçıoǧlu et al all applied bias levels can be understood due to charge storage (= Q/V).…”

“…[2,13] Both the N ss and R s values of these devices are important parameters that affect the main electrical parameters. [14] Since a bias voltage is applied across these structures, the combination of the interfacial insulator layer, depletion layer and series resistance of the device will share the applied bias voltage. The N ss and bulk traps formed at M/S interface, where charges can be stored and released when the appropriate forward applied bias and the external a.c. oscillation voltage are applied, strongly affect device performance.…”

Temperature Dependent Current-Voltage and Capacitance-Voltage Characteristics of an Au/n-Type Si Schottky Barrier Diode Modified Using a PEDOT:PSS Interlayer

“…25,26) The interface states and interfacial layer between the metal and semiconductor play a significant role in the determination of the Schottky barrier parameters of the devices.…”