The surface preparation for depositing Al 2 O 3 for fabricating Au/Ni/Al 2 O 3 /n-GaN (0001) metal oxide semiconductor (MOS) capacitors was optimized as a step toward realization of high performance GaN MOSFETs. The GaN surface treatments studied included cleaning with piranha (H 2 O 2 :H 2 SO 4 ¼ 1:5), (NH 4 ) 2 S, and 30% HF etches. By several metrics, the MOS capacitor with the piranha-etched GaN had the best characteristics. It had the lowest capacitance-voltage hysteresis, the smoothest Al 2 O 3 surface as determined by atomic force microscopy (0.2 nm surface roughness), the lowest carbon concentration ($0.78%) at the Al 2 O 3 /n-GaN interface (from x-ray photoelectron spectroscopy), and the lowest oxide-trap charge (Q T ¼ 1.6 Â 10 11 cm À2 eV À1

This paper reports on the influence of deposition temperature on the structure, composition, and electrical properties of TiO 2 thin films deposited on n-type silicon (100) by plasma-assisted atomic layer deposition (PA-ALD). TiO 2 layers ∼20 nm thick, deposited at temperatures ranging from 100 to 300 • C, were investigated. Samples deposited at 200 • C and 250 • C had the most uniform coverage as determined by atomic force microscopy. The average carbon concentration throughout the oxide layer and at the TiO 2 /Si interface was lowest at 200 • C. Metal oxide semiconductor capacitors (MOSCAPs) were fabricated, and profiled by capacitance-voltage techniques. The sample prepared at 200 • C had negligible hysteresis (from a capacitance-voltage plot) and the lowest interface trap density (as extracted using the conductance method). Current-voltage measurements were carried out with top-to-bottom structures. At −2 V gate bias voltage, the smallest leakage current was 1.22 × 10 −5 A/cm 2 for the 100 9 and smaller leakage current density are highly desirable. The insulator deposition temperatures should be below 500• C, because capacitors are expected to be deposited after transistors formation.10 However, further research on the high dielectric materials is needed to fulfill those requirements.In the present study, plasma-assisted atomic layer deposition (PA-ALD) was employed to deposit thin insulating TiO 2 films, because it offers excellent atomic level control of layer thickness with good uniformity and conformality.11 With an O 2 plasma, the deposition can be conducted at a lower temperature and with a shorter purge time in cold-wall reactors than a conventional thermal ALD system. 12These characteristics are particularly suitable for growing capacitor dielectrics for use in DRAM, as it uses a three dimensional structure with a high aspect ratio to increase the effective surface area. 13The present work reports on the impact of the deposition temperature on the properties of TiO 2 films prepared by PA-ALD and on the performance of said films in silicon MOSCAPs. By correlating the oxide structure, surface morphology and impurity concentration with electrical properties (hysteresis, interface trap density and leakage current), an optimal deposition temperature is identified. ExperimentalTiO 2 ALD Film growth and metal contact deposition.-Before deposition, the n-type Si (100) substrates were cleaned with acetone and isopropyl alcohol (IPA) for 5 minutes at 40• C. TiO 2 was deposited by PA-ALD in an Oxford Instruments FlexAL ALD reactor with tetrakisdimethylamino titanium (TDMAT) kept at 39• C as the titanium precursor, and oxygen plasma as the oxidizing agent. The ALD growth temperatures were 100• C, 150• C and 300• C. All ALD depositions consisted of 400 cycles and each ALD cycle included a 0.4 second dose of TDMAT followed by a 4 second * Electrochemical Society Active Member.z E-mail: edgarjh@ksu.edu purge with Ar gas, and a 3 second exposure to the oxygen plasma followed by a 3 second purge. The plasma power and...

Superparamagnetic iron oxide nanoparticles were functionalized with a quasi-monolayer of 11-sulfoundecanoic acid and 10-phosphono-1-decanesulfonic acid ligands to create separable solid acid catalysts. The ligands are bound through carboxylate or phosphonate bonds to the magnetite core. The ligand-core bonding surface is separated by a hydrocarbon linker from an outer surface with exposed sulfonic acid groups. The more tightly packed monolayer of the phosphonate ligand corresponded to a higher sulfonic acid loading by weight, a reduced agglomeration of particles, a greater tendency to remain suspended in solution in the presence of an external magnetic field, and a higher catalytic activity per sulfonic acid group. The particles were characterized by thermogravimetric analysis (TGA), transmission electron microscopy (TEM), potentiometric titration, diffuse reflectance infrared Fourier transform spectroscopy (DRIFTS), inductively coupled plasma optical emission spectrometry (ICP-OES), and dynamic light scattering (DLS). In sucrose catalysis reactions, the phosphonic-sulfonic nanoparticles (PSNPs) were seen to be incompletely recovered by an external magnetic field, while the carboxylicsulfonic nanoparticles (CSNPs) showed a trend of increasing activity over the first four recycle runs. The activity of the acid-functionalized nanoparticles was compared to the traditional solid acid catalyst Amberlyst-15 for the hydrolysis of starch in aqueous solution. Catalytic activity for starch hydrolysis was in the order PSNPs > CSNPs > Amberlyst-15. Monolayer acid functionalization of iron oxides presents a novel strategy for the development of recyclable solid acid catalysts. † Electronic supplementary information (ESI) available: Complete reaction details for 10-phosphono-1-sulfonodecanic acid, and starch hydrolysis table. See

The benefits of dry oxidation of n ‐GaN for the fabrication of metal‐oxide‐semiconductor structures are reported. GaN thin films grown on sapphire by MOCVD were thermally oxidized for 30, 45 and 60 minutes in a pure oxygen atmosphere at 850 °C to produce thin, smooth GaOx layers. The GaN sample oxidized for 30 minutes had the best properties. Its surface roughness (0.595 nm) as measured by atomic force microscopy (AFM) was the lowest. Capacitance‐voltage measurements showed it had the best saturation in accumulation region and the sharpest transition from accumulation to depletion regions. Under gate voltage sweep, capacitance‐voltage hysteresis was completely absent. The interface trap density was minimum (Dit = 2.75×1010 cm–2eV–1) for sample oxidized for 30 mins. These results demonstrate a high quality GaOx layer is beneficial for GaN MOSFETs. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Articles you may be interested inCharacterization of plasma-enhanced atomic layer deposition of Al2O3 using dimethylaluminum isopropoxide J. Vac. Sci. Technol. A 32, 021514 (2014); 10.1116/1.4866378 Atomic layer deposited (TiO2)x(Al2O3)1−x/In0.53Ga0.47As gate stacks for III-V based metal-oxidesemiconductor field-effect transistor applications Appl. Phys. Lett. 100, 062905 (2012); 10.1063/1.3684803 Al 2 O 3 / NbAlO / Al 2 O 3 sandwich gate dielectric film on InP Appl. Phys. Lett. 96, 022904 (2010);This research focuses on the benefits and properties of TiO 2 -Al 2 O 3 nanostack thin films deposited on Ga 2 O 3 /GaN by plasma-assisted atomic layer deposition (PA-ALD) for gate dielectric development. This combination of materials achieved a high dielectric constant, a low leakage current, and a low interface trap density. Correlations were sought between the films' structure, composition, and electrical properties. The gate dielectrics were approximately 15 nm thick and contained 5.1 nm TiO 2 , 7.1 nm Al 2 O 3 , and 2 nm Ga 2 O 3 as determined by spectroscopic ellipsometry. The interface carbon concentration, as measured by x-ray photoelectron spectroscopy depth profile, was negligible for GaN pretreated by thermal oxidation in O 2 for 30 min at 850 C. The RMS roughness slightly increased after thermal oxidation and remained the same after ALD of the nanostack, as determined by atomic force microscopy. The dielectric constant of TiO 2 -Al 2 O 3 on Ga 2 O 3 /GaN was increased to 12.5 compared to that of pure Al 2 O 3 (8-9) on GaN. In addition, the nanostack's capacitance-voltage (C-V) hysteresis was small, with a total trap density of 8.74 Â 10 11 cm À2 . The gate leakage current density (J ¼ 2.81 Â 10 À8 A/cm 2 ) was low at þ1 V gate bias. These results demonstrate the promising potential of PA-ALD deposited TiO 2 /Al 2 O 3 for serving as the gate dielectric on Ga 2 O 3 /GaN based MOS devices.