The impact of process parameters on the fracture of device structures during chip joining on organic laminates

Abstract

Detailed observations of the impact of various process parameters on the fracture of brittle structures in low-k dielectric flip chips assembled on organic laminates using lead-free metallurgies are reported. Specifically, a simple model is first presented to evaluate the stresses transmitted to the chip back end of line structures which are susceptible to failure during the reflow at chip joining. These stresses are regulated by creep deformation, so that damage to the chip can be controlled by carefully engineering the creep properties of the solder joints. We introduce new experimental techniques to monitor the creep behaviour of the joints during the reflow. In particular, we describe the use of a laser interferometer technique to monitor the chip curvature with a high sampling rate (few Hz) throughout the reflow. It is shown that these measurements can be used to predict the likelihood of causing brittle fracture in the chip structures. Additionally, we present electron backscatter diffraction (EBSD) data for the microstructure of a large number of solder joints. Using a combination of these theoretical and experimental observations, we derive a complete phenomenology for brittle fractures in the chip during the reflow. The creep-limited stresses are a strong function of solder joint plastic strain rates, which in turn are a strong function of cooling rates during the reflow. Creep properties are also a strong function of the solder metallurgy: reducing the silver content in the SnAgCu alloys results in a higher propensity for creep and correspondingly lower stresses. Thermal treatments at high temperature, such as annealing, can affect the characteristics of the intermetallic compounds, resulting in different creep properties. These trends are observed as the limiting behaviour of the relatively large number of solder joints in typical flip chip packages, but due to the small size of the solder joints (approximately 100 µm in diameter), significant variability is observed from joint to joint in the interconnect array. We link this variability to the joint microstructure by showing that the size and orientation of the few grains generally forming these joints influence the risk to cause damage in the chip.

C4NP technology: Manufacturability, yields and reliability

“…Microhardness of solder joint are sensitive to the percent of Ag content (see Figure 2). This result agrees with the improvements on stress relaxation and white bump reduction observed with reduced Ag content [10].…”

“…Pb-free C4 interconnect stress build up during Chip Join cooling (reflow), due to CTE mismatch between device/organic carrier, can exceed device BEOL (Low K CVD) structure strength for specific design structure causing delamination / cracking. Thorough identification and characterization of the chip join process parameters impacting the stress build up are reported by Sylvestre, et al [10].…”

Large-Scale Correlations in the Orientation of Grains in Lead-Free Solder Joints

“…As argued in Ref. 10 , the maximum chip warpage during the reflow, which is the quantity reported here, is a good approximation to the flow stress from creep deformation. This maximum warpage occurs near room temperature during the cooling portion of the reflow, when the strain rate is approximately 10 -7 s -1 .…”

“…The difference in thermal expansion between the device [coefficient of thermal expansion (CTE) $ 4 ppm/°C] and the organic substrate (CTE $ 20 ppm/°C) imposes significant strains on the solder joints, which can be shown to be a function of several process parameters. 10 The data reported here were collected by varying the Ag content of the solder joints, keeping all other process parameters constant. As argued in Ref.…”

“…7 The creep properties of solder joints are especially important during the reflow used to join the semiconductor device to substrates, where large stresses can develop in the joints due to the difference in thermal expansion between device and substrate, leading to mechanical damage in the device. [8][9][10] Finite element models based on creep are also frequently invoked to explain fatigue data in thermal cycling during reliability testing. 11 It is generally assumed, however, that a complete understanding of the mechanical characteristics of solder joints will require a proper description of the anisotropic properties of the small number of grains forming the joints.…”