The Effect of Gate Oxide Processes on the Performance of 4H-SiC MOSFETs and Gate-Controlled Diodes

Wang, Y.; Tang, Kailin; Khan, T.; Balasubramanian, M.; Naik, Harsh; Wang, Wei; Chow, T. Paul

doi:10.1109/ted.2008.926674

Cited by 58 publications

(52 citation statements)

References 12 publications

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“…However, to discuss accurately the effects on l FE , the total D IT including the interface states that trap electrons at high gate voltage (or electric field) is necessary. Other techniques such as Halleffect measurements [23][24][25] or thermally-stimulated-current measurements 26,27 are necessary to evaluate the interface states at high gate voltage (or electric field). Okamoto et al showed the effect of trapped electrons that increase with oxide electric field on the field-effect mobility.…”

mentioning

confidence: 99%

Effects of interface state density on 4H-SiC n-channel field-effect mobility

Yoshioka¹,

Senzaki²,

Shimozato³

et al. 2014

Appl. Phys. Lett.

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Articles you may be interested inInfluence of the surface morphology on the channel mobility of lateral implanted 4H-SiC (0001) metal-oxidesemiconductor field-effect transistors J. Appl. Phys. 112, 084501 (2012); 10.1063/1.4759354 Effect of the oxidation process on the electrical characteristics of 4 H -Si C p -channel metal-oxidesemiconductor field-effect transistors Appl. Phys. Lett. 89, 023502 (2006); 10.1063/1.2221400 Correlation between channel mobility and shallow interface traps in SiC metal-oxide-semiconductor field-effect transistors J. Appl. Phys. 92, 6230 (2002); 10.1063/1.1513210Relationship between channel mobility and interface state density in SiC metal-oxide-semiconductor field-effect transistor A cause for highly improved channel mobility of 4H-SiC metal-oxide-semiconductor field-effect transistors on the (1120) face Appl.

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mentioning

confidence: 99%

Effects of interface state density on 4H-SiC n-channel field-effect mobility

Yoshioka¹,

Senzaki²,

Shimozato³

et al. 2014

Appl. Phys. Lett.

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“…2 shows the results of the C-V measurements compared with the C-V curve for the ideal case. As seen from the figure these devices exhibit a 'hook and ledge' feature observed in 4H-SiC and 6H-SiC [5,6] before due to the presence of large number of surface states in the bandgap. The interface state charges can be estimated from the 'hook' feature in the gated diode curve from accumulation to depletion, using the formula:…”

Section: Mos-gated Diode Measurementsmentioning

confidence: 80%

“…However, one of key obstacles in 4H-SiC power MOS devices, such as the power MOSFET and IGBT, is the inferior electrical characteristics of SiO 2 /4H-SiC interface, when compared to Si MOS, mainly due to the presence of large acceptor-like interface states near the conduction band edge which leads to a low inversion layer mobility. Over the years, different research groups have tried different gate dielectrics, annealing conditions and substrates to improve the inversion layer mobility [2][3][4][5].…”

Section: Introductionmentioning

confidence: 99%

EFFECT OF GATE OXIDE PROCESSES ON 4H-SiC MOSFETs ON (000-1) ORIENTED SUBSTRATE

Naik

Tang

Chow

2009

Int. J. Hi. Spe. Ele. Syst.

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We have fabricated, characterized and compared the performance of lateral n-channel 4H-SiC MOSFETs on (000-1) oriented substrates, using two different gate oxide processes. These processes include low-temperature deposited oxide and plasma-enhanced CVD oxide. Different MOSFET parameters, such as field-effect mobility, threshold voltage, Hall mobility and inversion sheet carrier concentration has been compared for the two processes.

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“…The presence of such saturation is consistent with a model of the interface in which large clusters composed of an excess of interfacial carbon or silicon are subsequently passivated (and dissolved) by the indiffusing nitrogen, with the formation of strong C N and Si N bonds. Finally, according to the more recent work by Wang et al [129] the action of nitrogen at the interface can assimilated to that of a positive oxide charge, neutralizing the negatively charged acceptor-like traps commonly present on 4H-SiC surfaces and forming charge dipoles at the SiO 2 /4H-SiC interface.…”

Section: Interface Transport Properties In the Sio 2 /Sic Systemmentioning

confidence: 99%

Nanoscale transport properties at silicon carbide interfaces

Roccaforte¹,

Giannazzo²,

Raineri³

2010

J. Phys. D: Appl. Phys.

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Abstract. Wide band gap semiconductors promise devices with performances not achievable using silicon technology. Among them, Silicon Carbide (SiC) is considered the top-notch material for a new generation of power electronic devices, ensuring the improved energy efficiency requested in the modern society. In spite of the significant progresses achieved in the last decade in the material quality, there are still several scientific open issues related to the basic transport properties at SiC interfaces and ion-doped regions that can affect the devices performances, keeping them still far from their theoretical limits. Hence, significant efforts in fundamental research at nanoscale have become mandatory to better understand the carrier transport phenomena, both at surfaces and interfaces. In this paper, the most recent experiences on nanoscale transport properties will be addressed, reviewing the relevant key points for the basic devices building blocks. The selected topics include the major concerns related to the electronic transport in metal/SiC interfaces, to the carrier concentration and mobility in ion-doped regions, and to channel mobility in metal/oxide/SiC systems. Some aspects related to interfaces between different SiC polytypes are also presented. All these issues will be discussed considering the current status and the drawbacks of SiC devices.

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The Effect of Gate Oxide Processes on the Performance of 4H-SiC MOSFETs and Gate-Controlled Diodes

Cited by 58 publications

References 12 publications

Effects of interface state density on 4H-SiC n-channel field-effect mobility

Effects of interface state density on 4H-SiC n-channel field-effect mobility

EFFECT OF GATE OXIDE PROCESSES ON 4H-SiC MOSFETs ON (000-1) ORIENTED SUBSTRATE

Nanoscale transport properties at silicon carbide interfaces

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