The development of an atom chip with through silicon vias for an ultra-high-vacuum cell

Abstract

This paper describes the development, fabrication and examination of an atom chip through silicon vias (TSV), which is anodically bonded with a Pyrex glass cell to form an ultra-high-vacuum system for the application of Bose-Einstein condensation (BEC) experiments. The silicon via is etched by the inductively coupled plasma reactive ion etch and filled by copper plating technology. The metal wires on both sides of the atom chips are patterned by the lithography process. Three different sizes of TSV are made and tested by continuously applying a maximum current of 17 A under the vacuum (70 Torr) and in air. In addition, after the thermal cycling of an anodic bonding process (requested at 350 • C) and a high electric field of 1000 V m −1 , the TSV on atom chips can still hold the ultra-high vacuum (UHV). The conductive and vacuum yields of the TSV improved from 50% to 100% and from 75% to 81.25%, respectively after the modification of the fabrication process. Finally, the UHV test of TSV on atom chips at room temperature can be reached at 8 × 10 −10 Torr, thus satisfying the requirements of atomic physics experiments under the UHV environment.

Fabrication and Optimization of High Aspect Ratio Through-Silicon-Vias Electroplating for 3D Inductor

“…Before the electroplating process starting, pretreatment work to remove air bubbles in the vias was required. In general, there are three pretreatment methods: ultrasonic cleaning, rinsing with deionized water, and vacuum processing [ 21 , 22 ]. To determine whether there were bubbles in the TSVs soaked in the electroplated solution, we chose to observe those holes through the dark field of the microscope, from Hitachi (Tokyo, Japan).…”

Electrohydrodynamic Printed PEDOT:PSS/Graphene/PVA Circuits for Sustainable and Foldable Electronics

“…EHD printing is notable for its ability to create small patterns with a comparatively large printing nozzle, allowing for greater material adaptability. [ 27,30–34 ]…”

The fabrication of a double-layer atom chip with through silicon vias for an ultra-high-vacuum cell

“…This substantially increases the flexibility of magnetic field design for ultracold quantum gases, BEC and atomic physics experiments [2][3][4]. Later, atom chips are integrated directly to the miniaturized BEC vacuum system 0960-1317/14/045013+10$33.00 and a portable BEC vacuum system is then developed [5][6][7]. In these studies, only a single layer of wire patterns on atom chips are integrated to the vacuum chamber, and therefore the changes and controllability of the trapped atoms in the magnetic field is limited.…”

“…Finally in the electrical measurement results, the upper and bottom wires (width 100 μm) can withstand a current of 6 A for a continuous 5 min without burnout, in both atmosphere and under vacuum. In this study, a fabricated double-layer atom chip was bonded to a Pyrex glass cell by using the anodic bonding method [6,7], creating a miniaturized UHV chamber for BEC and atomic physics experiments. Moreover, after meeting the requirements to heat the atom chip to 250 • C and under an applied voltage of 1000 V during the anodic bonding process, the electroplated TSV on atom chips passed an examination of the helium leaking detection after this heat treatment without any cracks.…”