SUNBAR - A Universal Boundary Scan Architecture for a Sea-of-Gates Semi-Custom Environment

Buchner, T.; Bernath, E.; Gurkasch, R.; Schwederski, Thomas; Werkmann, H.

doi:10.1109/esscirc.1992.5468166

ESSCIRC '92: Eighteenth European Solid-State Circuits Conference 1992

DOI: 10.1109/esscirc.1992.5468166

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SUNBAR - A Universal Boundary Scan Architecture for a Sea-of-Gates Semi-Custom Environment

T. Buchner

E. Bernath

R. Gurkasch

et al.

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Cited by 3 publications

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A MCM test strategy using boundary scan-cells integrated into silicon substrates is presented. The differences between IC-based boundary scan and active substrate boundary scan and their eflects on scan-cell placement and design are highlighted. A yield optimized partition of the test circuitry and an adaption to commercially available boundary scan testsystems is proposed. Active substrates with boundary scan test capabilities are fabricated based on the identified requirements. The adaption to the test system is evaluated.

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A sea-of-gates-based, 10 MIPS 16-bit RISC processor testbed for failsafe applications

Jurczyk

Schwederski

1993 European Conference on Design Automation With the European Event in ASIC Design

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SUNBAR - A Universal Boundary Scan Architecture for a Sea-of-Gates Semi-Custom Environment

Cited by 3 publications

References 5 publications

Optimized placement of boundary scan circuitry on semi-custom ASICs

Optimized placement of boundary scan circuitry on semi-custom ASICs

Boundary scan adaption for active substrate MCM-test

A sea-of-gates-based, 10 MIPS 16-bit RISC processor testbed for failsafe applications

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