2013 International Conference on Indium Phosphide and Related Materials (IPRM) 2013
DOI: 10.1109/iciprm.2013.6562631
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Sub-50-nm InGaAs MOSFET with n-InP source on Si substrate

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Cited by 8 publications
(4 citation statements)
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“…In this case, the transfer of epitaxially grown layers onto a Si substrate can be simultaneously introduced for future integration with Si-CMOS circuits. In our first trial, we observed degradations in the drain current density and maximum transconductance because the channel thickness was too small [5]. In this report, we observed the channel-thickness dependence of fabricated InGaAs MOSFETs with an n-InP source on a Si substrate.…”
Section: Introductionmentioning
confidence: 59%
See 1 more Smart Citation
“…In this case, the transfer of epitaxially grown layers onto a Si substrate can be simultaneously introduced for future integration with Si-CMOS circuits. In our first trial, we observed degradations in the drain current density and maximum transconductance because the channel thickness was too small [5]. In this report, we observed the channel-thickness dependence of fabricated InGaAs MOSFETs with an n-InP source on a Si substrate.…”
Section: Introductionmentioning
confidence: 59%
“…The fabrication process is almost the same as the procedure reported in [5]. First, an epitaxial structure with a 5-nm i-InP barrier, an i-InGaAs channel, an n-InP source, a 10-nm n-InGaAs contact, a 20-nm i-InP etch stop, and a 200-nm i-InGaAs etch stop was grown on an n-InP substrate by MOVPE.…”
Section: Methodsmentioning
confidence: 99%
“…In the past few years, various materials have been aggressively investigated as alternative channel materials to Si such as Ge for p-channel and III-V compound semiconductors for n-channel transistors. It is revealed that saturation velocity and electron mobility of InGaAs are two times and ten times greater than that of Si, respectively (Yonai et al, 2011;Kato et al, 2013).…”
Section: Discussionmentioning
confidence: 97%
“…To the best of our knowledge, these values are the best values that have ever been reported and they satisfy the ITRS target requirements. On the other hand, shortchannel effects were observed in these devices, and a III-V-OI InGaAs MOSFET with an n-InP source on an Si-substrate with vertical scaling was fabricated [12,13]. The thickness of the Al 2 O 3 layer was reduced from 10 nm to 5 nm, and that of the InGaAs channel layer was reduced from 12 nm to 10 nm.…”
Section: Heavily Doped Inp Sourcementioning
confidence: 98%