Study of 4H–SiC trench MOSFET structures

High-voltage and low specific on-resistance power UMOSFET using P and N type columns

“…This increases the density of equipotential lines in the lower corners of the P-type implant layer leading to the electric field crowding and the avalanche breakdown. In this case, the peak electric field (at the breakdown) occurs at the corner of the trench bottom p-n junction [20]. In this structure, the equipotential crowding lines in the lower corners of P-type implant layer occur when the density of equipotential lines is very low in the drift region.…”

On the simulation and analytical modeling of on-state DC characteristics of Silicon Carbide Double-implanted MOSFETs

“…From this point of view, the parameters reported in various publications [6][7][8][9][10][11][12] on SiC MOSFETs have limited utility in simulation of DMOSFETs in SiC. For example, Ref.…”

“…[8] uses a planar MOSFET structure, and in addition, ignores the effect of interface traps on mobility reduction and does not consider high temperature operation; Ref. [9] uses a trench MOSFET structure and does not explain the choice of parameter values employed in simulation; Ref. [10] uses a planar MOSFET and extracts parameters using model equations which are not employed widely; Ref.…”

“…SENTAURUS [5], for simulating the on-state characteristics of a SiC DMOSFET at elevated temperatures. As we point out, the parameters reported in literature [6][7][8][9][10][11][12] cannot be used directly for such device simulations. Fig.…”

Super-junction trench MOSFETs for improved energy conversion efficiency

“…The drive for increased energy conversion efficiency is pushing device physicists and engineers down the path of wide bandgap semiconductor materials like silicon-carbide [1] and gallium-nitride [2]. However, advanced device designs like the super-junction charge balance concept have given silicon additional impetus to continue delivering optimal performance [3].…”