SOI circuits powered by embedded solar cell

Chen, Chang‐Lee; Chen, Chenson K.; Vitale, Steven A.

doi:10.1109/soi.2011.6081793

Cited by 4 publications

(5 citation statements)

References 2 publications

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“…In addition, the deposited a-Si:H layers may be not as perfect as the simulated ones, thus causes a relatively lower V oc and FF than the simulated result. Even so, the experimental conversion efficiency is higher than those previously reported [10], [11]. This was contributed by both good passivation of a-Si:H layers on the front surface and BSF effect on the rear surface.…”

Section: A Simulation and Characterization Of Shj Solar Cellcontrasting

confidence: 64%

“…Ok et al [6] realized an interdigitated front grid structure and prepared cells through a set of photolithography processes. By optimizing the base and shadowing fraction, conversion efficiency up to 11 In this paper, we introduce an ultrathin silicon heterojunction (SHJ) solar cell, which consisted of a 10-μm epitaxial mono-crystalline silicon (c-Si) layer and hydrogenated amorphous silicon (a-Si:H) layers on SOI substrate. The buried SiO 2 (BOX) in SOI does not only provide good passivation for the back surface to improve V oc but also optical reflection for long-wavelength solar light to improve J sc .…”

Section: S Olar Cells Integrated On Silicon-on-insulator (Soi)mentioning

confidence: 99%

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Ultrathin Crystalline Silicon Heterojunction Solar Cell Integrated on Silicon-on-Insulator Substrate

Duan

Bian

et al. 2015

IEEE Trans. Electron Devices

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To achieve power generation on IC chips, a hydrogenated amorphous silicon (a-Si:H)/crystalline silicon (c-Si) heterojunction solar cell was designed and fabricated on silicon-on-insulator substrate, where a 9-µm epitaxial p-type c-Si layer served as light absorption layer and the buried SiO 2 as back surface passivation layer. It was found that a 1-µm heavily doped thin p + layer was vital for improving the cell performances. Efficiency up to 12.7% with an open-circuit voltage of 679.7 mV was achieved on a 1.0-cm 2 square cell. The device performance was also investigated by annealing at different temperatures. The results suggested that a relatively large thickness of a-Si:H and transparent conductive oxide layers could improve thermal stability of the solar cells at temperature above 300°C.Index Terms-Power generation, silicon heterojunction (SHJ) solar cell, silicon on insulator (SOI), thermal stability.

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Section: A Simulation and Characterization Of Shj Solar Cellcontrasting

confidence: 64%

Section: S Olar Cells Integrated On Silicon-on-insulator (Soi)mentioning

confidence: 99%

Ultrathin Crystalline Silicon Heterojunction Solar Cell Integrated on Silicon-on-Insulator Substrate

Duan

Bian

et al. 2015

IEEE Trans. Electron Devices

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“…Fábio Alex da Silva fabio.a.silva@unesp.br 1 São Paulo State University (Unesp), Institute of Science and Technology, Sorocaba, Brazil 2 Centro Universitário FEI, São Bernardo do Campo, Brazil 3 Imec Leuven, Belgium An important characteristic of the PIN diode is its low dark current [6][7]. This characteristic can be important for the design of ultralow power autonomous systems.…”

Section: Introductionmentioning

confidence: 99%

“…Most of these autonomous devices are designed to operate in the ultra-low power (ULP) regime where a small amount of energy is required. To reduce dissipated power, such sensors can be designed in a Silicon-on-Insulator (SOI) Complementary Metal-Oxide-Semiconductor (CMOS) technology [3][4], where a solar cell could be embedded.…”

Section: Introductionmentioning

confidence: 99%

Lateral PIN Photodiode with Germanium and Silicon Layer on SOI Wafers

Silva

Doria

Simoen

et al. 2023

Preprint

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Here, it has been verified through numerical simulations calibrated to experimental data the changes that the insertion of a germanium layer can bring to the electrical power generation of a silicon solar cell. The studied device is a lateral PIN photodiode embedded in a wafer with SOI (Silicon-On-Insulator) technology as part of a CMOS (Complementary Metal Oxide Semiconductor) circuit. The insertion of a germanium layer on top or below a silicon PIN diode has been considered. Results showed that different semiconductor characteristics (bandgap, mobility, and absorption coefficients) result in a general improvement in the solar cell performance, therefore allowing a better understanding of the phenomena that occur in the photogeneration of a cell with a heterojunction between germanium and silicon.

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“…Most of these autonomous devices are designed to operate in the ultra-low power (ULP) regime where a small amount of energy is required. To reduce dissipated power, such sensors can be designed in a Siliconon-Insulator (SOI) Complementary Metal-Oxide-Semiconductor (CMOS) technology [3][4], where a solar cell could be embedded.…”

Section: Introductionmentioning

confidence: 99%

Lateral PIN Photodiode with Germanium and Silicon Layer on SOI Wafers

Silva,

Dória,

Simoen

et al. 2023

JICS

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It has been verified through numerical simulations calibrated to experimental data the changes that the insertion of a germanium layer can bring to the electrical power generation of a silicon solar cell. The insertion of a germanium layer on top or below a silicon PIN diode designed in SOI technology has been considered. Results showed that different semiconductor characteristics (bandgap, mobility, and absorption coefficients) result in a general improvement in the solar cell performance, being able to reach a power 136% greater than the device without the heterogeneous layer. In the evaluated device the average power was improved from 9.43 nW to 14.92 nW with the Ge layer insertion. Besides that, the analysis has allowed for a better understanding of the phenomena that occur in the photogeneration of a cell with a heterojunction between germanium and silicon.

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SOI circuits powered by embedded solar cell

Cited by 4 publications

References 2 publications

Ultrathin Crystalline Silicon Heterojunction Solar Cell Integrated on Silicon-on-Insulator Substrate

Ultrathin Crystalline Silicon Heterojunction Solar Cell Integrated on Silicon-on-Insulator Substrate

Lateral PIN Photodiode with Germanium and Silicon Layer on SOI Wafers

Lateral PIN Photodiode with Germanium and Silicon Layer on SOI Wafers

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