Single-Event Transient Induced Harmonic Errors in Digitally Controlled Ring Oscillators

Abstract

Single-event transient (SET) induced harmonic errors have been observed in digitally controlled ring oscillators (DCRO). Accumulated phase error is used to characterize harmonic errors in ring oscillator circuits. An analytical model for determining minimum and maximum SET transient duration capable of generating a harmonic is described. Simulation and TPA laser experimental results on a 40-nm DCRO are shown to confirm the assertion of the harmonic vulnerability window with respect to SET pulsewidth. Further more, fault injection experimental results on three RO designs built with discrete commercial off-the-shelf components are included to demonstrate the relationship between harmonic response and SET pulsewidth. Index Terms-ADPLL, DCO, digital circuits, harmonic error, ring oscillator, single-event transient (SET).

An In-Depth Analysis of Ring Oscillators: Exploiting Their Configurable Duty-Cycle

“…In [19] a problem of using ring oscillators within radiation environments is demonstrated. That problem is called harmonic induced error because a single event transient (SET) produced by the impact of a particle can shift the frequency of a ring oscillator from its fundamental frequency to the third harmonic of that frequency.…”

“…Replacing (34) and (35) in (19) and (20), and at each node with individually controlled bias voltages are:…”

Radiation-Tolerant Digitally Controlled Ring Oscillator in 65-nm CMOS

“…Alternatively, layout techniques such as Enclosed Layout Transistor (ELT) geometries [3] can be used to reduce the amount of TID degradation. Considering SEEs, ring oscillators were found to be susceptible to transient frequency and phase errors [4], missing pulses [5] and stimulation of harmonic oscillation modes [6]. The impact of these radiation responses on closed loop PLL circuits have also been studied [7] and other components of conventional phase locked loops optimized to a point where the oscillator remains as the largest SEE sensitivity [8].…”

“…The impact of these radiation responses on closed loop PLL circuits have also been studied [7] and other components of conventional phase locked loops optimized to a point where the oscillator remains as the largest SEE sensitivity [8]. Hardening against these effects has been achieved by measures such as the replication of bias stages [4], duplicating or triplicating larger parts of the oscillator [9], [10] and oscillator stage design methodologies aimed at suppressing the propagation of harmonic modes [6].…”

Widening and narrowing of time interval due to single‐event transients in 45 nm vernier‐type TDC

“…When the electronic circuits are operated in radiation environment such as space, the circuits deviate from their expected behaviour leading to malfunction. Single-event transient (SET) is one of the radiation effects [1][2][3][4][5] that causes a transient current spike at the output of the struck device. The effect of such a transient current pulse or spike is that it will propagate through the logic gate circuitry and can be latched in a memory element such as flip-flop (FF) as an erroneous logic state [6].…”