Single Event Latch-Up Hardening Using TCAD Simulations in 130 nm and 65 nm Embedded SRAM in Flash-Based FPGAs

Abstract

In this work 3D-TCAD simulation is used to investigate and harden single event latch-up (SEL) occurring in embedded SRAMs, in both 130 nm and 65 nm Flash-based Field Programmable Gate Arrays (FPGAs). The methodology to perform accurate SEL simulations on realistic designs suitable for high volume manufacturing is presented. One important new finding is that depending on the technology node, the number of SRAM cells included in the 3D structure significantly affects the SEL threshold. The number of SRAM cells needs to be optimized for accurate SEL prediction within a reasonable simulation time.The simulation results are validated using heavy ion and neutron data. After trade-off studies, process mitigation solutions are chosen to improve the SEL threshold in 65 nm and achieve immunity in neutron environment.Index Terms-3D-TCAD simulation, flash-based FPGA, single event latch-up, SRAMs.

Effect of Temperature on Single Event Latchup Sensitivity

“…More specifically, it is shown the trend for the range of temperature considered. As expected, threshold LET decreases as the temperature increases and increases as the doping profile increases [8]. Moreover, it is interesting to focus on the trend.…”

“…Different studies have been performed in which other factors are considered. For instance, doping profile, substrate and well taps placement and anode to cathode spacing have been investigated in the literature, revealing that SEL sensitivity depends on them [8]- [16]. However, it is also interesting to analyze the behavior of cross section when these factors are combined.…”

Single-Event Latchup sensitivity: Temperature effects and the role of the collected charge

“…8, the threshold LET trend for the doping profile is shown. As expected, threshold LET decreases as the temperature increases and increases as the doping profile increases [10]. If we consider the condition in which the device design is more favorable to induce Single-Event Latchup, as the worst-case scenario (lowest threshold LET, i.e.…”

“…a variation on the SEL sensitivity. Specifically, the doping profile influences the PNP bipolar current gain and the resistances inside the device [10]. For instance, a lower doping profile leads to a higher resistance.…”

“…Different studies have been performed in which the vulnerability to SEL is investigated considering different design approaches. For instance, the doping profile, the substrate and well taps placement and the anode to cathode spacing have been investigated in the literature, revealing that the susceptibility to SEL is directly related to these parameters and they could be used to harden a component at design level [10]- [18].…”