Simulation Study of a Novel Snapback Free Reverse-Conducting SOI-LIGBT With Embedded P-Type Schottky Barrier Diode

Yi, Bo; Lin, Jingfeng; Zhang, Bingke; Cheng, Junji; Xiang, Yong

doi:10.1109/ted.2020.2982615

Cited by 27 publications

(10 citation statements)

References 25 publications

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“…Subsequently, the RC-GTO transitions to operate as a conventional GTO. This shift from NPN BJT to GTO operation is marked by a voltage jump and an exponential increase in anode current, a process known as the snapback phenomenon [29][30][31].…”

Section: Device Structure and Mechanismmentioning

confidence: 99%

Simulation Study of 4H-SiC Low Turn-Off Loss and Snapback-Free Reverse-Conducting Gate Turn-Off Thyristor with N-Float Structure

Wu,

Li,

et al. 2024

Electronics

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In this study, a novel integrated 4H-SiC reverse-conducting gate turn-off thyristor (GTO) featuring an N-type floating (NF) structure is proposed. The proposed NF-structured 4H-SiC GTO outperforms conventional reverse-conducting GTOs in forward conduction, effectively eliminating the snapback phenomenon. This is achieved by increasing lateral resistance above the P-injector and modifying the electron current path during early turn-on. NF structures with a doping concentration of 2 × 1014 cm−3 and thicknesses exceeding 4 μm have been indicated to successfully eliminate the snapback phenomenon. Moreover, the anode-shorted structure enhances the GTO’s breakdown voltage and concurrently reduces turn-off losses by 85% at low current densities.

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Section: Device Structure and Mechanismmentioning

confidence: 99%

Simulation Study of 4H-SiC Low Turn-Off Loss and Snapback-Free Reverse-Conducting Gate Turn-Off Thyristor with N-Float Structure

Wu,

Li,

et al. 2024

Electronics

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“…In the short-circuit condition, the most failures of devices are attributed to the activation of parasitic transistor, and adjusting hole current path is an efficiency way to suppress the latch up. The most effective approach to prevent the latch up is lowering the saturation current (Isat) through employing series diodes or MOSs to extract holes in drift region [15], [16], [17].…”

Section: Introductionmentioning

confidence: 99%

Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability

Pan

et al. 2023

IEEE J. Electron Devices Soc.

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Easy inter-connection is a crucial advantage of the single-chip power ICs, which makes power devices with multiple ports easy to improve carrier controllability without increasing process difficulty. Electrical characteristics of the power devices get further improved thanks to the advanced carrier controllability. In this paper, a silicon-on-isolator lateral IGBT (SOI-LIGBT) featured four hybrid gates is proposed to obtain outstanding carrier controllability in turn-on, turn-off and short-circuit conditions for the first time. Four hybrid gates include three planar gates (G 1 , G 2 and G 3 ) and a trench gate (G 4 ), of which G 3 and G 4 are grounded gate to lower saturation current and suppress latch up. Low turn-off time (t OFF ), di/dt and improved short-circuit withstanding capability are obtained through providing different input signals to these gates. In the turn-on, G 2 is pre-charged to a stable voltage equal to gate voltage (V G1 ) to suppress the high di/dt before V G1 starts to rise. In the turn-off, a P-type inversion is induced by the negative voltage of G 2 (V G2 ), which provides a low-resistance hole current path to extract the stored holes. In the short-circuit condition, G 3 and G 4 are both shorted to the ground to lower the saturation current and suppress the activation of parasitic NPN transistor, resulting in an improved short-circuit withstanding time (t SC ). Compared with the conventional SOI-LIGBT, t OFF and di/dt are reduced by 43.6% and 53.08%, and t SC is prolonged from 3.04µs to 8.89µs at DC bus voltage of 400V.INDEX TERMS Hybrid gates, carrier controllability, turn-on, di/dt, turn-off time, short-circuit, short-circuit withstanding time, SOI, lateral IGBT, LIGBT, SOI-LIGBT.

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“…Multi-gates devices show better performance by controlling the anode gate, but it needs complex controlling circuits [ 12 – 15 ]. Integrating a diode in the LIGBT to realize reverse conduction and suppress snapback is a smart method, yet the schottky barrier diode makes the performance of the device to be influenced by the temperature [ 16 ].…”

Section: Introductionmentioning

confidence: 99%

Snapback-Free Reverse-Conducting SOI LIGBT with an Integrated Self-Biased MOSFET

et al. 2022

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A novel snapback-free RC-LIGBT with integrated self-biased N-MOSFET is proposed and investigated by simulation. The device features an integrated self-biased N-MOSFET(ISM) on the anode active region. One side of the ISM is shorted to the P + anode electrode of RC-LIGBT and the other side is connected to the N + anode via a floating ohmic contact. The adaptively turn-on/off of the ISM contributes to improve the static and dynamic performance of the ISM RC-LIGBT. In the forward-state, due to the off-state of the ISM, the snapback could be effectively suppressed without requiring extra device area compared to the SSA (separated shorted anode) and STA (segmented trenches in the anode) LIGBTs. In the reverse conduction, the ISM is turned on and the parasitic NPN in the ISM is punched through, which provides a current path for the reverse current. Meanwhile, during the turn-off and reverse recovery states, the ISM turns on, providing a rapid electron extraction path. Thus, a superior tradeoff between the on-state voltage drop (Von) and turnoff loss (Eoff) as well as an improved reverse recovery characteristic can be obtained. Compared to the STA device, the proposed ISM RC-LIGBT reduces Eoff by 21.5% without snapback. Its reverse recovery charge is reduced by 53.7%/58.6% compared to that of the SSA LIGBT with Lb = 40/60 μm at the same Von. Due to the prominent static and dynamic characteristic, the power loss of ISM RC-LIGBT in a completed switching cycle is reduced.

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Simulation Study of a Novel Snapback Free Reverse-Conducting SOI-LIGBT With Embedded P-Type Schottky Barrier Diode

Cited by 27 publications

References 25 publications

Simulation Study of 4H-SiC Low Turn-Off Loss and Snapback-Free Reverse-Conducting Gate Turn-Off Thyristor with N-Float Structure

Simulation Study of 4H-SiC Low Turn-Off Loss and Snapback-Free Reverse-Conducting Gate Turn-Off Thyristor with N-Float Structure

Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability

Snapback-Free Reverse-Conducting SOI LIGBT with an Integrated Self-Biased MOSFET

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