Self-screened high performance multi-layer MoS₂transistor formed by using a bottom graphene electrode

Abstract

We investigated the carrier transport in multi-layer MoS2 with consideration of the contact resistance (R(c)) and interlayer resistance (R(int)). A bottom graphene contact was suggested to overcome the degradation of I(d) modulation in a back gated multi-layer MoS2 field effect transistor (FET) due to the accumulated R(int) and increased R(c) with increasing thickness. As a result, non-degraded drain current (I(d)) modulation with increasing flake thickness was achieved due to the non-cumulative R(int). Benefiting from the low R(c) induced by the negligible Schottky barrier at the graphene/MoS2 interface, the intrinsic carrier transport properties immune to R(c) were investigated in the multi-layer MoS2 FET. ∼2 times the enhanced carrier mobility was attained from the self-screened channel in the bottom graphene contacted device, compared to those with top metal contacts.

P‐Type Polar Transition of Chemically Doped Multilayer MoS2 Transistor

“…Figure a shows the carrier transport path in a pristine MoS 2 NFET in which electrons injected from a metal electrode enter the MoS 2 sheet beneath the metal electrode first and are then transported to the channel. The graded color in the channel indicates varying carrier densities in different MoS 2 layers under gate modulation, while the deep red color represents high carrier density. The Schottky barrier height associated with the Pd–MoS 2 contact interface has been reported to be 0.4 eV for electrons .…”

Energy Dissipation in Black Phosphorus Heterostructured Devices

“…Graphene has been used as an electrode with several 2D semiconductors and provides an atomically sharp and intimate interface with small R c . Besides this, graphene exhibits very high κ of 5000 W m −1 K −1 , expected to be more appropriate as a contact material for thermal management in nanoscale devices …”

Van der Waals Heterostructure Based Field Effect Transistor Application

“…With the bottom graphene contact for 2DSCs transistors, nearly perfect work function matching lead to a barrier-free contact, which can significantly decrease Rc. MoS 2 and WSe 2 transistors using this strategy have been demonstrated [25,70,73,74]. Staggered contacts mean that TMD channel and source/drain electrodes are on different sides of graphene.…”

“…Compared with chemical doping, which will destroy the covalent bond of TMDs within layers, the stacking of graphene can create a undamaged van der Waals contact and a ultraclean interface, which prevents Fermi level pinning [25,75]. There are some other reports demonstrate a stacking structure formed by MoS 2 and graphene to reduce the connect resistance [73,77,81]. In this structure, graphene and metal are connected together to form electrodes and molybdenum disulfide (MoS 2 ) is used as channel.…”