Robust level converter design for sub-threshold logic

Chang, Ik Joon; Kim, Jae‐Joon; Roy, Kaushik

doi:10.1145/1165573.1165579

Cited by 16 publications

(6 citation statements)

References 3 publications

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“…Another technique is to modify either a Type-I or -II level converter by using a reduced swing inverter (RSI) to reduce leakage and weaken the pull-up circuit [5], [6]. Chang et al used the RSI to essentially lower the V SG of each PMOS, on a Type-I converter, by raising V G to operate between V high and V high − 2 * V T P .…”

Section: Introductionmentioning

confidence: 99%

“…This design complicates the topology by at least 18 transistors (not including the voltage doubler), augmenting its susceptibility to variation. The topology in [5] does not also easily support scalable voltage inputs. It cannot track the delay of a DVS circuit, because the cross-coupled PMOS devices are constantly weakened by the RSI, regardless of the input voltage level.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

An Energy-Efficient Subthreshold Level Converter in 130-nm CMOS

Wooters

Calhoun

Blalock

2010

IEEE Trans. Circuits Syst. II

106

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This brief presents a fast energy-efficient level converter capable of converting an input signal from subthreshold voltages up to the nominal supply voltage. Measured results from a 130-nm test chip show robust conversion from 188 mV to 1.2 V with no intermediate supplies required. A combination of circuit methods makes the converter robust to the large variations in the current characteristics of subthreshold circuits. To support dynamic voltage scaling, the level converter can upconvert an input at any voltage within this range to 1.2 V.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

An Energy-Efficient Subthreshold Level Converter in 130-nm CMOS

Wooters

Calhoun

Blalock

2010

IEEE Trans. Circuits Syst. II

106

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show abstract

“…Furthermore, for each of the traditional level converters described, an incremental improvement is possible by adding a voltage doubler at the input of the level shifter. Voltage doublers have been proposed in [11][12] that bootstrap the true and complement signal to almost double the voltage of the input signal. For subthreshold circuits, this means that the doubler output is typically raised to superthreshold levels (e.g.…”

Section: Existing Level Convertersmentioning

confidence: 99%

Level Converters for Ultra Low Power IoT Applications

Chary¹,

Anitha²,

Alamillo³

et al. 2018

IJET

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For efficient ultra-low power IoT applications, working with various communication devices and sensors which operating voltages from subthreshold to superthreshold levels which requires wide variety of robust level converters for signal interfacing with low power dissipation. This paper proposes two topologies of level converter circuits that offer dramatic improvement in power and performance when compared to the existing level converters that shift signals from sub to super threshold levels for IoT applications. At 250 mV, the first proposed circuit -a modification of a tradition al current mirror level converter -offers the best energy efficiency with approximately seven times less energy consumption per operation than the existing design, but suffers from a slight reduction in performance. However, a second proposed circuit -based on a two-stage level converter -at the same voltage enhances performance by several orders of magnitude while still maintaining a modest improvement in energy efficiency. The Energy Delay Products (EDP) of the two proposed designs are equivalent and are approximately four times better than the best existing design. Consequently, the two circuit options either optimizes power or performance with improved overall EDP.

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“…This is because the drive current of the low-voltage circuit significantly lowers as the supply voltage reduces and the conventional level shifter cannot convert input signals into high output signals. To mitigate this problem, several level shifters and remedies have been investigated [3,4,5,6]. For example, increasing the drive current of the level shifters by enlarging the transistor channel width and multi-stage level shifters or inverters with plural supply voltages have been used.…”

Section: Introductionmentioning

confidence: 99%

“…Thus the nodes OUT and OUTB cannot be changed. Several level shifter circuits have been proposed to overcome the above problems [3,4,5,6]. However, because these circuits are based on the cross-coupled circuit, they cannot solve the problems.…”

Section: Introductionmentioning

confidence: 99%