Ring oscillator reliability model to hardware correlation in 45nm SOI

Dam, C. van; Hauser, M.

doi:10.1109/irps.2013.6532061

Cited by 3 publications

(1 citation statement)

References 8 publications

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“…When high-energy particles bombard semiconductor devices, the charge generated by the ionization will be collected by the device source and drain, forming a transient current pulse at the electrode, thus affecting the normal operation of the circuit [3]. The PLL working in the irradiation environment is prone to be bombarded by high-energy particles, which induces single-event transient, causing phase and frequency drift of the output signal, leading to chaos in the entire communication system of the spacecraft and seriously threatening the reliability of the spacecraft [4][5][6]. Each module constituting the PLL has different responses to the SET effect [7][8][9].…”

Section: Introductionmentioning

confidence: 99%

A Single-Event-Hardened Scheme of Phase-Locked Loop Microsystems for Aerospace Applications

2022

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In order to improve the ability of the phase-locked loop (PLL) microsystem applied in the aerospace environment to suppress the irradiation effect, this study presents an efficient charge pump hardened scheme by using the radiation-hardened-by-design (RHBD) technology. In this study, the sensitivity analysis of the single-event transient (SET) at different nodes of charge pump and different bombardment energies is carried out. Without changing the original structure and loop parameters, a hardened scheme of phase-locked loop to suppress the single-event effect is proposed. A digital control circuit is added between the charge pump and low-pass filter, which greatly reduces the sensitivity of the charge pump to the SET. The classical double-exponential current pulse model is used to simulate the SET effect on the unreinforced and reinforced phase-locked loops, and the reliability of the proposed reinforcement scheme is verified. The simulation results based on the SMIC 130 nm standard complementary metal–oxide–semiconductor (CMOS) process show that the peak value of the transient response fluctuation of the phase-locked loop using the proposed single-event-hardened scheme decreased by 94.2%, the lock recovery time increased by 75.3%, and the maximum phase shift decreased by 90.8%. This shows that the hardened scheme can effectively reduce the sensitivity of the PLL microsystems to the SET effects.

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