Review of Semiconductor Flash Memory Devices for Material and Process Issues

Abstract

Vertically integrated NAND (V‐NAND) flash memory is the main data storage in modern handheld electronic devices, widening its share even in the data centers where installation and operation costs are critical. While the conventional scaling rule has been applied down to the design rule of ≈15 nm (year 2013), the current method of increasing device density is stacking up layers. Currently, 176‐layer‐stacked V‐NAND flash memory is available on the market. Nonetheless, increasing the layers invokes several challenges, such as film stress management and deep contact hole etching. Also, there should be an upper bound for the attainable stacking layers (400–500) due to the total allowable chip thickness, which will be reached within 6–7 years. This review summarizes the current status and critical challenges of charge‐trap‐based flash memory devices, with a focus on the material (floating‐gate vs charge‐trap‐layer), array‐level circuit architecture (NOR vs NAND), physical integration structure (2D vs 3D), and cell‐level programming technique (single vs multiple levels). Current efforts to improve fabrication processes and device performances using new materials are also introduced. The review suggests directions for future storage devices based on the ionic mechanism, which may overcome the inherent problems of flash memory devices.

Parallel Integration of Nanoscale Atomic Layer Deposited Ge2Sb2Te5 Phase-Change Memory with an Indium Gallium Zinc Oxide Thin-Film Transistor

“…Therefore, these two figures indicated that the rapidly increased V BL,reset limited the N to only 50. However, this estimation was based on the impractical device dimension, and the more practical size of the TFT was assumed for the eventual V-TFT-PcRAM (channel-hole diameter/single-layer thickness ∼130/25 nm) . In this case, the contact resistance between the IGZO and ITO interface should be considered for scaled dimensions.…”

Analog Resistive Switching and Artificial Synaptic Behavior of ITO/WOX/TaN Memristors

“…Nonvolatile memory (NVM) devices with high switching speeds and high-density integration should be developed for the effective implementation of artificial intelligence (AI) technologies [ 1 ]. Because of the low cost and high compatibility of flash memory for complementary metal-oxide-semiconductor (CMOS) fabrication, silicon-based flash memories are the current market leaders for NVMs [ 2 ]. However, owing to physical limitations, we have reached the limit for increasing the memory density [ 3 ].…”

Optically and Electrically Controllable Light-Emitting Nonvolatile Resistive Switching Memory

“…1 Flash memory is an example of NVM and has been widely applied in electronic devices. 2 With the advance of science and technology, memory not only needs to be small to store a huge amount of information but also requires faster write and read speeds. 3,4 On the other hand, low-energy consumption is also required for developing memory due to the wide application of portable electronic products.…”

“…For nonvolatile memory (NVM), the contents which were stored previously will be retained even after removing the power supply . Flash memory is an example of NVM and has been widely applied in electronic devices . With the advance of science and technology, memory not only needs to be small to store a huge amount of information but also requires faster write and read speeds. , On the other hand, low-energy consumption is also required for developing memory due to the wide application of portable electronic products. − Because of the physical limit of the gate oxide, flash memory cannot simultaneously fulfill storage needs and size reduction .…”