Reliability characterization of power devices which operate under power cycling

Abstract

The safe-operating-area (SOA) of automotive DMOS transistors, which are operated repeatedly under high power pulses (power cycling), is lower than the classical singlepulse SOA and it is dependent on the geometry of the transistor. In this paper, we present a test system for reliability characterization of power devices, of various geometries, which operate under power cycling conditions. INTRODUCTIONAutomotive smart-power switches are used in powertrain applications (e.g. engine management) to drive actuators which have an inductive behavior (relays, valves) or a capacitive behavior (light bulbs). Often, the switching element is a DMOS (double-diffused MOS) transistor. These devices are subject to elevated junction temperatures, caused by self-heating, during high power transients generated while driving inductive or capacitive loads. While operated repetitively under high power events (power cycling), the reliability of the whole chip can be affected by cracks in the DMOS metallization system due to thermo-mechanical effects [1]. Mechanical stresses accumulate with each power cycle, until fracture of inter-metal dielectric (IMD) occurs, which is followed by short-circuit of nearby metal lines [2].

A Novel Multi-Scale Method for Thermo-Mechanical Simulation of Power Integrated Circuits

“…These approaches lead to less "heavy" computational models, at the expense of decreased result accuracy. For example, manual time-consuming model simplifications have been carried out in [12] in order to assess by direct FEM simulations, the chip failure during Active Power Cycling (APC) tests and to correlate the numerical simulation results with the spot of emerging failure.…”